arm: dts: mt2701: Use real clock for UARTs

We used to use a fixed rate clock for the UARTs. Now that we have clock
support we can associate the correct clocks to the UARTs and drop the
26MHz fixed rate UART clock.

Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Erin Lo 2016-11-04 15:43:08 +08:00 committed by Matthias Brugger
parent adf6eb7774
commit 28d6e3647b
1 changed files with 8 additions and 10 deletions

View File

@ -73,12 +73,6 @@ rtc_clk: dummy32k {
#clock-cells = <0>;
};
uart_clk: dummy26m {
compatible = "fixed-clock";
clock-frequency = <26000000>;
#clock-cells = <0>;
};
clk26m: oscillator@0 {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -186,7 +180,8 @@ uart0: serial@11002000 {
"mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x400>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
clock-names = "baud", "bus";
status = "disabled";
};
@ -195,7 +190,8 @@ uart1: serial@11003000 {
"mediatek,mt6577-uart";
reg = <0 0x11003000 0 0x400>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
clock-names = "baud", "bus";
status = "disabled";
};
@ -204,7 +200,8 @@ uart2: serial@11004000 {
"mediatek,mt6577-uart";
reg = <0 0x11004000 0 0x400>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
clock-names = "baud", "bus";
status = "disabled";
};
@ -213,7 +210,8 @@ uart3: serial@11005000 {
"mediatek,mt6577-uart";
reg = <0 0x11005000 0 0x400>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
clocks = <&uart_clk>;
clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
clock-names = "baud", "bus";
status = "disabled";
};
};