mirror of https://gitee.com/openkylin/linux.git
drm/i915: Remove debugfs/i915_ppgtt_info
The information presented here is not relevant to current development. We can either use the context information, but more often we want to inspect the active gpu state. The ulterior motive is to eradicate dev->filelist. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181227121549.29139-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
parent
eb3e1e3383
commit
28e52b98b9
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@ -2076,124 +2076,6 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
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return 0;
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return 0;
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}
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}
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static int per_file_ctx(int id, void *ptr, void *data)
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{
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struct i915_gem_context *ctx = ptr;
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struct seq_file *m = data;
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struct i915_hw_ppgtt *ppgtt = ctx->ppgtt;
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if (!ppgtt) {
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seq_printf(m, " no ppgtt for context %d\n",
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ctx->user_handle);
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return 0;
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}
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if (i915_gem_context_is_default(ctx))
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seq_puts(m, " default context:\n");
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else
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seq_printf(m, " context %d:\n", ctx->user_handle);
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ppgtt->debug_dump(ppgtt, m);
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return 0;
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}
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static void gen8_ppgtt_info(struct seq_file *m,
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struct drm_i915_private *dev_priv)
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{
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struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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int i;
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if (!ppgtt)
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return;
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for_each_engine(engine, dev_priv, id) {
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seq_printf(m, "%s\n", engine->name);
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for (i = 0; i < 4; i++) {
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u64 pdp = I915_READ(GEN8_RING_PDP_UDW(engine, i));
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pdp <<= 32;
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pdp |= I915_READ(GEN8_RING_PDP_LDW(engine, i));
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seq_printf(m, "\tPDP%d 0x%016llx\n", i, pdp);
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}
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}
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}
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static void gen6_ppgtt_info(struct seq_file *m,
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struct drm_i915_private *dev_priv)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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if (IS_GEN(dev_priv, 6))
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seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
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for_each_engine(engine, dev_priv, id) {
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seq_printf(m, "%s\n", engine->name);
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if (IS_GEN(dev_priv, 7))
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seq_printf(m, "GFX_MODE: 0x%08x\n",
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I915_READ(RING_MODE_GEN7(engine)));
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seq_printf(m, "PP_DIR_BASE: 0x%08x\n",
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I915_READ(RING_PP_DIR_BASE(engine)));
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seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n",
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I915_READ(RING_PP_DIR_BASE_READ(engine)));
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seq_printf(m, "PP_DIR_DCLV: 0x%08x\n",
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I915_READ(RING_PP_DIR_DCLV(engine)));
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}
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if (dev_priv->mm.aliasing_ppgtt) {
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struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
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seq_puts(m, "aliasing PPGTT:\n");
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seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd.base.ggtt_offset);
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ppgtt->debug_dump(ppgtt, m);
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}
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seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
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}
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static int i915_ppgtt_info(struct seq_file *m, void *data)
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{
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struct drm_i915_private *dev_priv = node_to_i915(m->private);
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struct drm_device *dev = &dev_priv->drm;
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struct drm_file *file;
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int ret;
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mutex_lock(&dev->filelist_mutex);
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ret = mutex_lock_interruptible(&dev->struct_mutex);
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if (ret)
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goto out_unlock;
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intel_runtime_pm_get(dev_priv);
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if (INTEL_GEN(dev_priv) >= 8)
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gen8_ppgtt_info(m, dev_priv);
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else if (INTEL_GEN(dev_priv) >= 6)
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gen6_ppgtt_info(m, dev_priv);
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list_for_each_entry_reverse(file, &dev->filelist, lhead) {
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struct drm_i915_file_private *file_priv = file->driver_priv;
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struct task_struct *task;
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task = get_pid_task(file->pid, PIDTYPE_PID);
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if (!task) {
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ret = -ESRCH;
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goto out_rpm;
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}
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seq_printf(m, "\nproc: %s\n", task->comm);
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put_task_struct(task);
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idr_for_each(&file_priv->context_idr, per_file_ctx,
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(void *)(unsigned long)m);
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}
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out_rpm:
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intel_runtime_pm_put(dev_priv);
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mutex_unlock(&dev->struct_mutex);
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out_unlock:
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mutex_unlock(&dev->filelist_mutex);
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return ret;
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}
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static int count_irq_waiters(struct drm_i915_private *i915)
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static int count_irq_waiters(struct drm_i915_private *i915)
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{
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{
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struct intel_engine_cs *engine;
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struct intel_engine_cs *engine;
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@ -4912,7 +4794,6 @@ static const struct drm_info_list i915_debugfs_list[] = {
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{"i915_context_status", i915_context_status, 0},
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{"i915_context_status", i915_context_status, 0},
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{"i915_forcewake_domains", i915_forcewake_domains, 0},
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{"i915_forcewake_domains", i915_forcewake_domains, 0},
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{"i915_swizzle_info", i915_swizzle_info, 0},
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{"i915_swizzle_info", i915_swizzle_info, 0},
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{"i915_ppgtt_info", i915_ppgtt_info, 0},
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{"i915_llc", i915_llc, 0},
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{"i915_llc", i915_llc, 0},
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{"i915_edp_psr_status", i915_edp_psr_status, 0},
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{"i915_edp_psr_status", i915_edp_psr_status, 0},
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{"i915_energy_uJ", i915_energy_uJ, 0},
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{"i915_energy_uJ", i915_energy_uJ, 0},
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@ -1488,84 +1488,6 @@ static int gen8_ppgtt_alloc_4lvl(struct i915_address_space *vm,
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
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struct i915_page_directory_pointer *pdp,
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u64 start, u64 length,
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gen8_pte_t scratch_pte,
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struct seq_file *m)
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{
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struct i915_address_space *vm = &ppgtt->vm;
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struct i915_page_directory *pd;
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u32 pdpe;
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gen8_for_each_pdpe(pd, pdp, start, length, pdpe) {
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struct i915_page_table *pt;
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u64 pd_len = length;
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u64 pd_start = start;
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u32 pde;
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if (pdp->page_directory[pdpe] == ppgtt->vm.scratch_pd)
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continue;
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seq_printf(m, "\tPDPE #%d\n", pdpe);
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gen8_for_each_pde(pt, pd, pd_start, pd_len, pde) {
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u32 pte;
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gen8_pte_t *pt_vaddr;
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if (pd->page_table[pde] == ppgtt->vm.scratch_pt)
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continue;
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pt_vaddr = kmap_atomic_px(pt);
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for (pte = 0; pte < GEN8_PTES; pte += 4) {
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u64 va = (pdpe << GEN8_PDPE_SHIFT |
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pde << GEN8_PDE_SHIFT |
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pte << GEN8_PTE_SHIFT);
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int i;
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bool found = false;
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for (i = 0; i < 4; i++)
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if (pt_vaddr[pte + i] != scratch_pte)
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found = true;
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if (!found)
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continue;
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seq_printf(m, "\t\t0x%llx [%03d,%03d,%04d]: =", va, pdpe, pde, pte);
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for (i = 0; i < 4; i++) {
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if (pt_vaddr[pte + i] != scratch_pte)
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seq_printf(m, " %llx", pt_vaddr[pte + i]);
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else
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seq_puts(m, " SCRATCH ");
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}
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seq_puts(m, "\n");
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}
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kunmap_atomic(pt_vaddr);
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}
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}
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}
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static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
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{
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struct i915_address_space *vm = &ppgtt->vm;
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const gen8_pte_t scratch_pte = vm->scratch_pte;
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u64 start = 0, length = ppgtt->vm.total;
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if (use_4lvl(vm)) {
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u64 pml4e;
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struct i915_pml4 *pml4 = &ppgtt->pml4;
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struct i915_page_directory_pointer *pdp;
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gen8_for_each_pml4e(pdp, pml4, start, length, pml4e) {
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if (pml4->pdps[pml4e] == ppgtt->vm.scratch_pdp)
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continue;
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seq_printf(m, " PML4E #%llu\n", pml4e);
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gen8_dump_pdp(ppgtt, pdp, start, length, scratch_pte, m);
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}
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} else {
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gen8_dump_pdp(ppgtt, &ppgtt->pdp, start, length, scratch_pte, m);
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}
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}
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static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt)
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static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt)
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{
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{
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struct i915_address_space *vm = &ppgtt->vm;
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struct i915_address_space *vm = &ppgtt->vm;
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@ -1670,7 +1592,6 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915)
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gen8_ppgtt_notify_vgt(ppgtt, true);
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gen8_ppgtt_notify_vgt(ppgtt, true);
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ppgtt->vm.cleanup = gen8_ppgtt_cleanup;
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ppgtt->vm.cleanup = gen8_ppgtt_cleanup;
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ppgtt->debug_dump = gen8_dump_ppgtt;
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ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma;
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ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma;
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ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
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ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
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@ -1686,60 +1607,6 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915)
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return ERR_PTR(err);
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return ERR_PTR(err);
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}
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}
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static void gen6_dump_ppgtt(struct i915_hw_ppgtt *base, struct seq_file *m)
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{
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struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
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const gen6_pte_t scratch_pte = base->vm.scratch_pte;
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struct i915_page_table *pt;
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u32 pte, pde;
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gen6_for_all_pdes(pt, &base->pd, pde) {
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gen6_pte_t *vaddr;
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if (pt == base->vm.scratch_pt)
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continue;
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if (i915_vma_is_bound(ppgtt->vma, I915_VMA_GLOBAL_BIND)) {
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u32 expected =
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GEN6_PDE_ADDR_ENCODE(px_dma(pt)) |
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GEN6_PDE_VALID;
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u32 pd_entry = readl(ppgtt->pd_addr + pde);
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if (pd_entry != expected)
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seq_printf(m,
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"\tPDE #%d mismatch: Actual PDE: %x Expected PDE: %x\n",
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pde,
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pd_entry,
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expected);
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seq_printf(m, "\tPDE: %x\n", pd_entry);
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}
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vaddr = kmap_atomic_px(base->pd.page_table[pde]);
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for (pte = 0; pte < GEN6_PTES; pte += 4) {
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int i;
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for (i = 0; i < 4; i++)
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if (vaddr[pte + i] != scratch_pte)
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break;
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if (i == 4)
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continue;
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seq_printf(m, "\t\t(%03d, %04d) %08llx: ",
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pde, pte,
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(pde * GEN6_PTES + pte) * I915_GTT_PAGE_SIZE);
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for (i = 0; i < 4; i++) {
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if (vaddr[pte + i] != scratch_pte)
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seq_printf(m, " %08x", vaddr[pte + i]);
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else
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seq_puts(m, " SCRATCH");
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}
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seq_puts(m, "\n");
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}
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kunmap_atomic(vaddr);
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}
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}
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/* Write pde (index) from the page directory @pd to the page table @pt */
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/* Write pde (index) from the page directory @pd to the page table @pt */
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static inline void gen6_write_pde(const struct gen6_hw_ppgtt *ppgtt,
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static inline void gen6_write_pde(const struct gen6_hw_ppgtt *ppgtt,
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const unsigned int pde,
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const unsigned int pde,
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@ -2136,7 +2003,6 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
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ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
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ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
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ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries;
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ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries;
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ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup;
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ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup;
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ppgtt->base.debug_dump = gen6_dump_ppgtt;
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ppgtt->base.vm.vma_ops.bind_vma = ppgtt_bind_vma;
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ppgtt->base.vm.vma_ops.bind_vma = ppgtt_bind_vma;
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ppgtt->base.vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
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ppgtt->base.vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
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@ -413,8 +413,6 @@ struct i915_hw_ppgtt {
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struct i915_page_directory_pointer pdp; /* GEN8+ */
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struct i915_page_directory_pointer pdp; /* GEN8+ */
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struct i915_page_directory pd; /* GEN6-7 */
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struct i915_page_directory pd; /* GEN6-7 */
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};
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};
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void (*debug_dump)(struct i915_hw_ppgtt *ppgtt, struct seq_file *m);
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};
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};
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struct gen6_hw_ppgtt {
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struct gen6_hw_ppgtt {
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