mirror of https://gitee.com/openkylin/linux.git
Qualcomm ARM64 Updates for v5.1
* Add MSM8998 RPMCC, I2C, and USB related nodes * Add MSM8996 rpmpd node * Fix typo in MSM8996 pin definitions * Disable MSM8996 VFE smmu to fix security violation * Add I2C, SPI, rpmcc, uart, and WCN3990 wlan nodes on QCS404 * Enable SDCC1 HS400 support on QCS404 * Add a multitude of nodes on SDM845: SD, UFS, USB, LPASS, SCM, QSPI, PDC, DPU, videocc, GPU, RPMh bus interconnect, WCN3990 WLAN * Add gpio ranges to SDM845 TLMM * Fix regulator load on sdcard on MSM8998-mtp board * Add thermal trip points to cpufreq * Add SDM845 IOMMU info for SDHC, USB, and WLAN * Fix MSM8916 clock cell argument -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcZxDLAAoJEFKiBbHx2RXVWGgP/080wwgcj0gJP31orLypfSJa 9UYndhjdEVpomP3YOKNCUMyGO5MtQAIPXF3yPO30UER4mUsjDYmtZhlhIGPHDy3w 1ZAjIKPBb/9ujz3+/A4VHTVnySdgAdGDhUfXsae8cu+/55GGcbspbvev0Mt81QXm n5Wk0rI2LDJsVKoV5PVV/YuWZgf7cycvW7b3kGKDD9mckbJ4IJZqXOQ+3sd8Gal+ RSS3l82ndKTJ8fugHxCroxAbS0CqPESqd8X/nopNdM3z2c4jlDd57v3NpygyfPQ6 /zKergRb02j4YqsB7Gv9m868beqmGjrmbAov1+v1MMEztoobSPwQZK/dkerHz5yf e1K1dYHHnpvDA5sYZwNlTge/IojMZy5Rsm1Fs8ZQxun+6RrjfHW7QJbgQkcE2l/i ISjRPUQTOGN2d+6XfoIRu76m13A7H9LiutW2IG10p6vFrwePuE3hwCO5XH2puAak +1k4g+nBgzRlx+u01qKHqZq7nQwYfCq+fW3yqYOsepYTmaLUcT8+78C4PGu7Dz0P sYCooq+byJ5eOPaq4DpA5szU2FuBABlBqBRVA+Wmy9slNuHiiK1fIOPO4V97Glqz 2F4Iivr9mbw79OrXx6bcqJm6EbAgpvyonlRnw0BVYd+1DEVEHntSx2QVN5wiEjqe d6oyVpZT1VJb0CpnGU9p =FgSp -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dt Qualcomm ARM64 Updates for v5.1 * Add thermal trip points to cpufreq * Add SDM845 IOMMU info for SDHC, USB, and WLAN * Fix MSM8916 clock cell argument * tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: sdm845: Fixup dependency on RPMPD includes arm64: dts: sdm845: Add clocks and iommus to WCN3990 WLAN node arm64: dts: qcom: sdm845: Define iommus for USB controllers arm64: dts: qcom: sdm845: Define IOMMU for sdhc 2 arm64: dts: sdm845: wireup the thermal trip points to cpufreq arm64: dts: msm8916: remove bogus argument to the cpu clock [arnd: I've pulled the earlier branch again after an update, this adds the stuff listed above, and fixes a build error from the missing dependency, as I requested] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
29cf2ee3b5
|
|
@ -111,7 +111,7 @@ CPU0: cpu@0 {
|
|||
next-level-cache = <&L2_0>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&CPU_SPC>;
|
||||
clocks = <&apcs 0>;
|
||||
clocks = <&apcs>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
|
@ -123,7 +123,7 @@ CPU1: cpu@1 {
|
|||
next-level-cache = <&L2_0>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&CPU_SPC>;
|
||||
clocks = <&apcs 0>;
|
||||
clocks = <&apcs>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
|
@ -135,7 +135,7 @@ CPU2: cpu@2 {
|
|||
next-level-cache = <&L2_0>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&CPU_SPC>;
|
||||
clocks = <&apcs 0>;
|
||||
clocks = <&apcs>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
|
@ -147,7 +147,7 @@ CPU3: cpu@3 {
|
|||
next-level-cache = <&L2_0>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&CPU_SPC>;
|
||||
clocks = <&apcs 0>;
|
||||
clocks = <&apcs>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -13,10 +13,11 @@
|
|||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/phy/phy-qcom-qusb2.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
|
||||
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
|
||||
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&intc>;
|
||||
|
|
@ -119,6 +120,7 @@ CPU0: cpu@0 {
|
|||
reg = <0x0 0x0>;
|
||||
enable-method = "psci";
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
#cooling-cells = <2>;
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
compatible = "cache";
|
||||
|
|
@ -135,6 +137,7 @@ CPU1: cpu@100 {
|
|||
reg = <0x0 0x100>;
|
||||
enable-method = "psci";
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
#cooling-cells = <2>;
|
||||
next-level-cache = <&L2_100>;
|
||||
L2_100: l2-cache {
|
||||
compatible = "cache";
|
||||
|
|
@ -148,6 +151,7 @@ CPU2: cpu@200 {
|
|||
reg = <0x0 0x200>;
|
||||
enable-method = "psci";
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
#cooling-cells = <2>;
|
||||
next-level-cache = <&L2_200>;
|
||||
L2_200: l2-cache {
|
||||
compatible = "cache";
|
||||
|
|
@ -161,6 +165,7 @@ CPU3: cpu@300 {
|
|||
reg = <0x0 0x300>;
|
||||
enable-method = "psci";
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
#cooling-cells = <2>;
|
||||
next-level-cache = <&L2_300>;
|
||||
L2_300: l2-cache {
|
||||
compatible = "cache";
|
||||
|
|
@ -174,6 +179,7 @@ CPU4: cpu@400 {
|
|||
reg = <0x0 0x400>;
|
||||
enable-method = "psci";
|
||||
qcom,freq-domain = <&cpufreq_hw 1>;
|
||||
#cooling-cells = <2>;
|
||||
next-level-cache = <&L2_400>;
|
||||
L2_400: l2-cache {
|
||||
compatible = "cache";
|
||||
|
|
@ -187,6 +193,7 @@ CPU5: cpu@500 {
|
|||
reg = <0x0 0x500>;
|
||||
enable-method = "psci";
|
||||
qcom,freq-domain = <&cpufreq_hw 1>;
|
||||
#cooling-cells = <2>;
|
||||
next-level-cache = <&L2_500>;
|
||||
L2_500: l2-cache {
|
||||
compatible = "cache";
|
||||
|
|
@ -200,6 +207,7 @@ CPU6: cpu@600 {
|
|||
reg = <0x0 0x600>;
|
||||
enable-method = "psci";
|
||||
qcom,freq-domain = <&cpufreq_hw 1>;
|
||||
#cooling-cells = <2>;
|
||||
next-level-cache = <&L2_600>;
|
||||
L2_600: l2-cache {
|
||||
compatible = "cache";
|
||||
|
|
@ -213,6 +221,7 @@ CPU7: cpu@700 {
|
|||
reg = <0x0 0x700>;
|
||||
enable-method = "psci";
|
||||
qcom,freq-domain = <&cpufreq_hw 1>;
|
||||
#cooling-cells = <2>;
|
||||
next-level-cache = <&L2_700>;
|
||||
L2_700: l2-cache {
|
||||
compatible = "cache";
|
||||
|
|
@ -1505,6 +1514,7 @@ sdhc_2: sdhci@8804000 {
|
|||
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
|
||||
<&gcc GCC_SDCC2_APPS_CLK>;
|
||||
clock-names = "iface", "core";
|
||||
iommus = <&apps_smmu 0xa0 0xf>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1624,6 +1634,7 @@ usb_1: usb@a6f8800 {
|
|||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
dma-ranges;
|
||||
|
||||
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
|
||||
|
|
@ -1652,6 +1663,7 @@ usb_1_dwc3: dwc3@a600000 {
|
|||
compatible = "snps,dwc3";
|
||||
reg = <0 0x0a600000 0 0xcd00>;
|
||||
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&apps_smmu 0x740 0>;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_enblslpm_quirk;
|
||||
phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
|
||||
|
|
@ -1666,6 +1678,7 @@ usb_2: usb@a8f8800 {
|
|||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
dma-ranges;
|
||||
|
||||
clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
|
||||
<&gcc GCC_USB30_SEC_MASTER_CLK>,
|
||||
|
|
@ -1694,6 +1707,7 @@ usb_2_dwc3: dwc3@a800000 {
|
|||
compatible = "snps,dwc3";
|
||||
reg = <0 0x0a800000 0 0xcd00>;
|
||||
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&apps_smmu 0x760 0>;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_enblslpm_quirk;
|
||||
phys = <&usb_2_hsphy>, <&usb_2_ssphy>;
|
||||
|
|
@ -2084,43 +2098,43 @@ rpmhpd_opp_table: opp-table {
|
|||
compatible = "operating-points-v2";
|
||||
|
||||
rpmhpd_opp_ret: opp1 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
|
||||
opp-level = <16>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_min_svs: opp2 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
|
||||
opp-level = <48>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_low_svs: opp3 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
|
||||
opp-level = <64>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_svs: opp4 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
|
||||
opp-level = <128>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_svs_l1: opp5 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
|
||||
opp-level = <192>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_nom: opp6 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
|
||||
opp-level = <256>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_nom_l1: opp7 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
|
||||
opp-level = <320>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_nom_l2: opp8 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
|
||||
opp-level = <336>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_turbo: opp9 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
|
||||
opp-level = <384>;
|
||||
};
|
||||
|
||||
rpmhpd_opp_turbo_l1: opp10 {
|
||||
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
|
||||
opp-level = <416>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -2226,6 +2240,8 @@ wifi: wifi@18800000 {
|
|||
reg = <0 0x18800000 0 0x800000>;
|
||||
reg-names = "membase";
|
||||
memory-region = <&wlan_msa_mem>;
|
||||
clock-names = "cxo_ref_clk_pin";
|
||||
clocks = <&rpmhcc RPMH_RF_CLK2>;
|
||||
interrupts =
|
||||
<GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -2239,6 +2255,7 @@ wifi: wifi@18800000 {
|
|||
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&apps_smmu 0x0040 0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -2250,18 +2267,41 @@ cpu0-thermal {
|
|||
thermal-sensors = <&tsens0 1>;
|
||||
|
||||
trips {
|
||||
cpu_alert0: trip0 {
|
||||
temperature = <75000>;
|
||||
cpu0_alert0: trip-point@0 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit0: trip1 {
|
||||
cpu0_alert1: trip-point@1 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu0_crit: cpu_crit {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu0_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu0_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu1-thermal {
|
||||
|
|
@ -2271,18 +2311,41 @@ cpu1-thermal {
|
|||
thermal-sensors = <&tsens0 2>;
|
||||
|
||||
trips {
|
||||
cpu_alert1: trip0 {
|
||||
temperature = <75000>;
|
||||
cpu1_alert0: trip-point@0 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit1: trip1 {
|
||||
cpu1_alert1: trip-point@1 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu1_crit: cpu_crit {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu1_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu1_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu2-thermal {
|
||||
|
|
@ -2292,18 +2355,41 @@ cpu2-thermal {
|
|||
thermal-sensors = <&tsens0 3>;
|
||||
|
||||
trips {
|
||||
cpu_alert2: trip0 {
|
||||
temperature = <75000>;
|
||||
cpu2_alert0: trip-point@0 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit2: trip1 {
|
||||
cpu2_alert1: trip-point@1 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu2_crit: cpu_crit {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu2_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu2_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu3-thermal {
|
||||
|
|
@ -2313,18 +2399,41 @@ cpu3-thermal {
|
|||
thermal-sensors = <&tsens0 4>;
|
||||
|
||||
trips {
|
||||
cpu_alert3: trip0 {
|
||||
temperature = <75000>;
|
||||
cpu3_alert0: trip-point@0 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit3: trip1 {
|
||||
cpu3_alert1: trip-point@1 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu3_crit: cpu_crit {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu3_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu3_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu4-thermal {
|
||||
|
|
@ -2334,18 +2443,41 @@ cpu4-thermal {
|
|||
thermal-sensors = <&tsens0 7>;
|
||||
|
||||
trips {
|
||||
cpu_alert4: trip0 {
|
||||
temperature = <75000>;
|
||||
cpu4_alert0: trip-point@0 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit4: trip1 {
|
||||
cpu4_alert1: trip-point@1 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu4_crit: cpu_crit {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu4_alert0>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu4_alert1>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu5-thermal {
|
||||
|
|
@ -2355,18 +2487,41 @@ cpu5-thermal {
|
|||
thermal-sensors = <&tsens0 8>;
|
||||
|
||||
trips {
|
||||
cpu_alert5: trip0 {
|
||||
temperature = <75000>;
|
||||
cpu5_alert0: trip-point@0 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit5: trip1 {
|
||||
cpu5_alert1: trip-point@1 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu5_crit: cpu_crit {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu5_alert0>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu5_alert1>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu6-thermal {
|
||||
|
|
@ -2376,18 +2531,41 @@ cpu6-thermal {
|
|||
thermal-sensors = <&tsens0 9>;
|
||||
|
||||
trips {
|
||||
cpu_alert6: trip0 {
|
||||
temperature = <75000>;
|
||||
cpu6_alert0: trip-point@0 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit6: trip1 {
|
||||
cpu6_alert1: trip-point@1 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu6_crit: cpu_crit {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu6_alert0>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu6_alert1>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu7-thermal {
|
||||
|
|
@ -2397,18 +2575,41 @@ cpu7-thermal {
|
|||
thermal-sensors = <&tsens0 10>;
|
||||
|
||||
trips {
|
||||
cpu_alert7: trip0 {
|
||||
temperature = <75000>;
|
||||
cpu7_alert0: trip-point@0 {
|
||||
temperature = <90000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit7: trip1 {
|
||||
cpu7_alert1: trip-point@1 {
|
||||
temperature = <95000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu7_crit: cpu_crit {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu7_alert0>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu7_alert1>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue