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spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK 

SPI common code does not support using CS discontinuously for now.
However, i.MX8DXL-EVK only uses CS1 without CS0. Therefore, add a flag
is_only_cs1 to set the correct TCR[PCS].

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200727031448.31661-4-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Clark Wang 2020-07-27 11:14:48 +08:00 committed by Mark Brown
parent 768ba4909a
commit 2a052590d4
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 8 additions and 3 deletions
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11
drivers/spi/spi-fsl-lpspi.c
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@ -98,6 +98,7 @@ struct fsl_lpspi_data {
struct clk *clk_ipg; struct clk *clk_ipg;
struct clk *clk_per; struct clk *clk_per;
bool is_slave; bool is_slave;
bool is_only_cs1;
bool is_first_byte; bool is_first_byte;
void *rx_buf; void *rx_buf;
@ -257,10 +258,9 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi)
temp |= fsl_lpspi->config.bpw - 1; temp |= fsl_lpspi->config.bpw - 1;
temp |= (fsl_lpspi->config.mode & 0x3) << 30; temp |= (fsl_lpspi->config.mode & 0x3) << 30;
temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
if (!fsl_lpspi->is_slave) { if (!fsl_lpspi->is_slave) {
temp |= fsl_lpspi->config.prescale << 27; temp |= fsl_lpspi->config.prescale << 27;
temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
/* /*
* Set TCR_CONT will keep SS asserted after current transfer. * Set TCR_CONT will keep SS asserted after current transfer.
* For the first transfer, clear TCR_CONTC to assert SS. * For the first transfer, clear TCR_CONTC to assert SS.
@ -421,7 +421,10 @@ static int fsl_lpspi_setup_transfer(struct spi_controller *controller,
fsl_lpspi->config.mode = spi->mode; fsl_lpspi->config.mode = spi->mode;
fsl_lpspi->config.bpw = t->bits_per_word; fsl_lpspi->config.bpw = t->bits_per_word;
fsl_lpspi->config.speed_hz = t->speed_hz; fsl_lpspi->config.speed_hz = t->speed_hz;
fsl_lpspi->config.chip_select = spi->chip_select; if (fsl_lpspi->is_only_cs1)
fsl_lpspi->config.chip_select = 1;
else
fsl_lpspi->config.chip_select = spi->chip_select;
if (!fsl_lpspi->config.speed_hz) if (!fsl_lpspi->config.speed_hz)
fsl_lpspi->config.speed_hz = spi->max_speed_hz; fsl_lpspi->config.speed_hz = spi->max_speed_hz;
@ -835,6 +838,8 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
fsl_lpspi = spi_controller_get_devdata(controller); fsl_lpspi = spi_controller_get_devdata(controller);
fsl_lpspi->dev = &pdev->dev; fsl_lpspi->dev = &pdev->dev;
fsl_lpspi->is_slave = is_slave; fsl_lpspi->is_slave = is_slave;
fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node,
"fsl,spi-only-use-cs1-sel");
controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
controller->transfer_one = fsl_lpspi_transfer_one; controller->transfer_one = fsl_lpspi_transfer_one;