mirror of https://gitee.com/openkylin/linux.git
spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK
SPI common code does not support using CS discontinuously for now. However, i.MX8DXL-EVK only uses CS1 without CS0. Therefore, add a flag is_only_cs1 to set the correct TCR[PCS]. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200727031448.31661-4-xiaoning.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -98,6 +98,7 @@ struct fsl_lpspi_data {
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struct clk *clk_ipg;
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struct clk *clk_per;
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bool is_slave;
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bool is_only_cs1;
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bool is_first_byte;
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void *rx_buf;
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@ -257,10 +258,9 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi)
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temp |= fsl_lpspi->config.bpw - 1;
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temp |= (fsl_lpspi->config.mode & 0x3) << 30;
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temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
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if (!fsl_lpspi->is_slave) {
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temp |= fsl_lpspi->config.prescale << 27;
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temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
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/*
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* Set TCR_CONT will keep SS asserted after current transfer.
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* For the first transfer, clear TCR_CONTC to assert SS.
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@ -421,7 +421,10 @@ static int fsl_lpspi_setup_transfer(struct spi_controller *controller,
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fsl_lpspi->config.mode = spi->mode;
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fsl_lpspi->config.bpw = t->bits_per_word;
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fsl_lpspi->config.speed_hz = t->speed_hz;
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fsl_lpspi->config.chip_select = spi->chip_select;
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if (fsl_lpspi->is_only_cs1)
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fsl_lpspi->config.chip_select = 1;
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else
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fsl_lpspi->config.chip_select = spi->chip_select;
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if (!fsl_lpspi->config.speed_hz)
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fsl_lpspi->config.speed_hz = spi->max_speed_hz;
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@ -835,6 +838,8 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
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fsl_lpspi = spi_controller_get_devdata(controller);
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fsl_lpspi->dev = &pdev->dev;
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fsl_lpspi->is_slave = is_slave;
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fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node,
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"fsl,spi-only-use-cs1-sel");
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controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
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controller->transfer_one = fsl_lpspi_transfer_one;
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