mirror of https://gitee.com/openkylin/linux.git
powerpc/512x: clk: minor comment updates
adjust (expand on or move) a few comments, add markers for easier navigation around helpers Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Anatolij Gustschin <agust@denx.de>
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@ -76,6 +76,8 @@ static struct clk_onecell_data clk_data;
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static struct mpc512x_ccm __iomem *clkregs;
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static DEFINE_SPINLOCK(clklock);
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/* common clk API wrappers {{{ */
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/* convenience wrappers around the common clk API */
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static inline struct clk *mpc512x_clk_fixed(const char *name, int rate)
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{
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@ -139,6 +141,8 @@ static inline struct clk *mpc512x_clk_muxed(const char *name,
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reg, pos, len, muxflags, &clklock);
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}
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/* }}} common clk API wrappers */
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/* helper to isolate a bit field from a register */
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static inline int get_bit_field(uint32_t __iomem *reg, uint8_t pos, uint8_t len)
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{
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@ -308,6 +312,8 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
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}
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}
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/* MCLK helpers {{{ */
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/*
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* helper code for the MCLK subtree setup
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*
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@ -338,8 +344,8 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
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/*
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* note that this declaration raises a checkpatch warning, but
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* it's the very data type which <linux/clk-provider.h> expects,
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* making this declaration pass checkpatch will break compilation
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* it's the very data type dictated by <linux/clk-provider.h>,
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* "fixing" this warning will break compilation
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*/
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static const char *parent_names_mux0[] = {
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"sys", "ref", "psc-mclk-in", "spdif-tx",
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@ -512,6 +518,8 @@ static void mpc512x_clk_setup_mclk(struct mclk_setup_data *entry, size_t idx)
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}
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}
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/* }}} MCLK helpers */
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static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq)
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{
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int sys_mul, sys_div, ips_div;
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@ -549,8 +557,8 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq)
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clks[MPC512x_CLK_IPS] = mpc512x_clk_divtable("ips", "csb",
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&clkregs->scfr1, 23, 3,
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divtab_2346);
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/* now setup anything below SYS and CSB and IPS */
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clks[MPC512x_CLK_DDR_UG] = mpc512x_clk_factor("ddr-ug", "sys", 1, 2);
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clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor("sdhc-x4", "csb", 4, 1);
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clks[MPC512x_CLK_SDHC_UG] = mpc512x_clk_divider("sdhc-ug", "sdhc-x4", 0,
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