mirror of https://gitee.com/openkylin/linux.git
drm/i915/ddi: write ELD where it's supposed to be done
The audio programming sequence states that the ELD must be written and
enabled after the pipe is ready. Indeed, this should clarify the
situation with
commit c79057922e
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Apr 16 16:56:09 2014 +0200
drm/i915: Remove vblank wait from haswell_write_eld
and Ville's review of it [1].
Moreover, we should not touch the relevant registers before we get the
audio power domain.
[1] http://mid.gmane.org/20140416155309.GK18465@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
parent
6189b0369c
commit
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@ -160,8 +160,6 @@ static void haswell_write_eld(struct drm_connector *connector,
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I915_WRITE(aud_cntrl_st2, tmp);
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POSTING_READ(aud_cntrl_st2);
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assert_pipe_disabled(dev_priv, pipe);
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/* Set ELD valid state */
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tmp = I915_READ(aud_cntrl_st2);
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DRM_DEBUG_DRIVER("HDMI audio: pin eld vld status=0x%08x\n", tmp);
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@ -1120,15 +1120,6 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
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enum port port = intel_ddi_get_encoder_port(intel_encoder);
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int type = intel_encoder->type;
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if (crtc->config.has_audio) {
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DRM_DEBUG_DRIVER("Audio on pipe %c on DDI\n",
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pipe_name(crtc->pipe));
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/* write eld */
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DRM_DEBUG_DRIVER("DDI audio: write eld information\n");
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intel_write_eld(intel_encoder);
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}
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if (type == INTEL_OUTPUT_EDP) {
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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intel_edp_panel_on(intel_dp);
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@ -1225,6 +1216,8 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
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if (intel_crtc->config.has_audio) {
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intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
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intel_write_eld(intel_encoder);
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tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
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tmp |= ((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe * 4));
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I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
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