From 2aa0de39fa071129fdd952a0d99828db8434d88f Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Mon, 27 Oct 2014 16:26:49 +0200 Subject: [PATCH] drm/i915/ddi: write ELD where it's supposed to be done The audio programming sequence states that the ELD must be written and enabled after the pipe is ready. Indeed, this should clarify the situation with commit c79057922ed6c2c6df1214e6ab4414fea1b23db2 Author: Daniel Vetter Date: Wed Apr 16 16:56:09 2014 +0200 drm/i915: Remove vblank wait from haswell_write_eld and Ville's review of it [1]. Moreover, we should not touch the relevant registers before we get the audio power domain. [1] http://mid.gmane.org/20140416155309.GK18465@intel.com Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_audio.c | 2 -- drivers/gpu/drm/i915/intel_ddi.c | 11 ++--------- 2 files changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 537f6d8927f1..158ad60a6e21 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c @@ -160,8 +160,6 @@ static void haswell_write_eld(struct drm_connector *connector, I915_WRITE(aud_cntrl_st2, tmp); POSTING_READ(aud_cntrl_st2); - assert_pipe_disabled(dev_priv, pipe); - /* Set ELD valid state */ tmp = I915_READ(aud_cntrl_st2); DRM_DEBUG_DRIVER("HDMI audio: pin eld vld status=0x%08x\n", tmp); diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 2688bc940879..56e7cb1ddc75 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1120,15 +1120,6 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder) enum port port = intel_ddi_get_encoder_port(intel_encoder); int type = intel_encoder->type; - if (crtc->config.has_audio) { - DRM_DEBUG_DRIVER("Audio on pipe %c on DDI\n", - pipe_name(crtc->pipe)); - - /* write eld */ - DRM_DEBUG_DRIVER("DDI audio: write eld information\n"); - intel_write_eld(intel_encoder); - } - if (type == INTEL_OUTPUT_EDP) { struct intel_dp *intel_dp = enc_to_intel_dp(encoder); intel_edp_panel_on(intel_dp); @@ -1225,6 +1216,8 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder) if (intel_crtc->config.has_audio) { intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO); + intel_write_eld(intel_encoder); + tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); tmp |= ((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe * 4)); I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);