mirror of https://gitee.com/openkylin/linux.git
Microblaze patches for 3.16-rc1
- Clean PCI and DMA handling - Use generic device.h - Some cleanups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEABECAAYFAlOQT0MACgkQykllyylKDCF7mwCbBso3EMWGPPkpMiieYiy6pVze AYYAoJ4xyXwVZC+bNf6Bf3ojU7QXPQc1 =qXNT -----END PGP SIGNATURE----- Merge tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze into next Pull Microblaze updates from Michal Simek: - cleanup PCI and DMA handling - use generic device.h - some cleanups * tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Fix typo in head.S s/substract/subtract/ microblaze: remove check for CONFIG_XILINX_CONSOLE microblaze: Use generic device.h microblaze: Do not setup empty unmap_sg function microblaze: Remove device_to_mask microblaze: Clean device dma_ops structure microblaze: Cleanup PCI_DRAM_OFFSET handling microblaze: Do not setup pci_dma_ops microblaze: Return default dma operations microblaze: Enable SERIAL_OF_PLATFORM
This commit is contained in:
commit
2b03adc191
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@ -49,6 +49,7 @@ CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_UARTLITE=y
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CONFIG_SERIAL_UARTLITE_CONSOLE=y
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CONFIG_SERIAL_OF_PLATFORM=y
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# CONFIG_HW_RANDOM is not set
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CONFIG_XILINX_HWICAP=y
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CONFIG_I2C=y
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@ -58,6 +58,7 @@ CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_UARTLITE=y
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CONFIG_SERIAL_UARTLITE_CONSOLE=y
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CONFIG_SERIAL_OF_PLATFORM=y
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# CONFIG_HW_RANDOM is not set
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CONFIG_XILINX_HWICAP=y
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CONFIG_I2C=y
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@ -2,6 +2,7 @@
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generic-y += barrier.h
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generic-y += clkdev.h
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generic-y += cputime.h
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generic-y += device.h
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generic-y += exec.h
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generic-y += hash.h
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generic-y += mcs_spinlock.h
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@ -1,26 +0,0 @@
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/*
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* Arch specific extensions to struct device
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License v2. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef _ASM_MICROBLAZE_DEVICE_H
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#define _ASM_MICROBLAZE_DEVICE_H
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struct device_node;
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struct dev_archdata {
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/* DMA operations on that device */
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struct dma_map_ops *dma_ops;
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void *dma_data;
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};
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struct pdev_archdata {
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u64 dma_mask;
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};
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#endif /* _ASM_MICROBLAZE_DEVICE_H */
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@ -35,16 +35,6 @@
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#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
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#define __dma_free_coherent(size, addr) ((void)0)
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static inline unsigned long device_to_mask(struct device *dev)
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{
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if (dev->dma_mask && *dev->dma_mask)
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return *dev->dma_mask;
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/* Assume devices without mask can take 32 bit addresses */
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return 0xfffffffful;
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}
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extern struct dma_map_ops *dma_ops;
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/*
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* Available generic sets of operations
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*/
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@ -52,20 +42,7 @@ extern struct dma_map_ops dma_direct_ops;
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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/* We don't handle the NULL dev case for ISA for now. We could
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* do it via an out of line call but it is not needed for now. The
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* only ISA DMA device we support is the floppy and we have a hack
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* in the floppy driver directly to get a device for us.
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*/
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if (unlikely(!dev) || !dev->archdata.dma_ops)
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return NULL;
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return dev->archdata.dma_ops;
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}
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static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
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{
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dev->archdata.dma_ops = ops;
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return &dma_direct_ops;
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}
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static inline int dma_supported(struct device *dev, u64 mask)
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@ -19,17 +19,14 @@
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#ifndef CONFIG_PCI
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#define _IO_BASE 0
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#define _ISA_MEM_BASE 0
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#define PCI_DRAM_OFFSET 0
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#else
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#define _IO_BASE isa_io_base
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#define _ISA_MEM_BASE isa_mem_base
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#define PCI_DRAM_OFFSET pci_dram_offset
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struct pci_dev;
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extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
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#define pci_iounmap pci_iounmap
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extern unsigned long isa_io_base;
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extern unsigned long pci_dram_offset;
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extern resource_size_t isa_mem_base;
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#endif
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@ -44,14 +44,6 @@ struct pci_dev;
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*/
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#define pcibios_assign_all_busses() 0
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#ifdef CONFIG_PCI
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extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
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extern struct dma_map_ops *get_pci_dma_ops(void);
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#else /* CONFIG_PCI */
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#define set_pci_dma_ops(d)
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#define get_pci_dma_ops() NULL
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#endif
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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@ -13,23 +13,6 @@
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#include <linux/export.h>
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#include <linux/bug.h>
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/*
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* Generic direct DMA implementation
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*
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* This implementation supports a per-device offset that can be applied if
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* the address at which memory is visible to devices is not 0. Platform code
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* can set archdata.dma_data to an unsigned long holding the offset. By
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* default the offset is PCI_DRAM_OFFSET.
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*/
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static unsigned long get_dma_direct_offset(struct device *dev)
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{
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if (likely(dev))
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return (unsigned long)dev->archdata.dma_data;
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return PCI_DRAM_OFFSET; /* FIXME Not sure if is correct */
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}
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#define NOT_COHERENT_CACHE
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static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
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@ -51,7 +34,7 @@ static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
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return NULL;
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ret = page_address(page);
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memset(ret, 0, size);
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*dma_handle = virt_to_phys(ret) + get_dma_direct_offset(dev);
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*dma_handle = virt_to_phys(ret);
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return ret;
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#endif
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@ -77,7 +60,7 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
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/* FIXME this part of code is untested */
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for_each_sg(sgl, sg, nents, i) {
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sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev);
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sg->dma_address = sg_phys(sg);
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__dma_sync(page_to_phys(sg_page(sg)) + sg->offset,
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sg->length, direction);
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}
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@ -85,12 +68,6 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
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return nents;
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}
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static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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}
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static int dma_direct_dma_supported(struct device *dev, u64 mask)
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{
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return 1;
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@ -104,7 +81,7 @@ static inline dma_addr_t dma_direct_map_page(struct device *dev,
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struct dma_attrs *attrs)
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{
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__dma_sync(page_to_phys(page) + offset, size, direction);
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return page_to_phys(page) + offset + get_dma_direct_offset(dev);
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return page_to_phys(page) + offset;
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}
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static inline void dma_direct_unmap_page(struct device *dev,
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@ -181,7 +158,6 @@ struct dma_map_ops dma_direct_ops = {
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.alloc = dma_direct_alloc_coherent,
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.free = dma_direct_free_coherent,
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.map_sg = dma_direct_map_sg,
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.unmap_sg = dma_direct_unmap_sg,
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.dma_supported = dma_direct_dma_supported,
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.map_page = dma_direct_map_page,
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.unmap_page = dma_direct_unmap_page,
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@ -205,7 +205,7 @@ GT4: /* r11 contains the rest - will be either 1 or 4 */
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GT16: /* TLB0 is 16MB */
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addik r9, r0, 0x1000000 /* means TLB0 is 16MB */
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TLB1:
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/* must be used r2 because of substract if failed */
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/* must be used r2 because of subtract if failed */
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addik r2, r11, -0x0400000
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bgei r2, GT20 /* size is greater than 16MB */
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/* size is >16MB and <20MB */
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@ -71,13 +71,9 @@ void __init setup_arch(char **cmdline_p)
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xilinx_pci_init();
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#ifdef CONFIG_VT
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#if defined(CONFIG_XILINX_CONSOLE)
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conswitchp = &xil_con;
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#elif defined(CONFIG_DUMMY_CONSOLE)
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#if defined(CONFIG_DUMMY_CONSOLE)
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conswitchp = &dummy_con;
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#endif
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#endif
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}
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#ifdef CONFIG_MTD_UCLINUX
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@ -229,31 +225,3 @@ static int __init debugfs_tlb(void)
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device_initcall(debugfs_tlb);
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# endif
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#endif
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static int dflt_bus_notify(struct notifier_block *nb,
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unsigned long action, void *data)
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{
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struct device *dev = data;
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/* We are only intereted in device addition */
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if (action != BUS_NOTIFY_ADD_DEVICE)
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return 0;
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set_dma_ops(dev, &dma_direct_ops);
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return NOTIFY_DONE;
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}
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static struct notifier_block dflt_plat_bus_notifier = {
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.notifier_call = dflt_bus_notify,
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.priority = INT_MAX,
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};
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static int __init setup_bus_notifier(void)
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{
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bus_register_notifier(&platform_bus_type, &dflt_plat_bus_notifier);
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return 0;
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}
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arch_initcall(setup_bus_notifier);
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@ -47,24 +47,9 @@ static int global_phb_number; /* Global phb counter */
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/* ISA Memory physical address */
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resource_size_t isa_mem_base;
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static struct dma_map_ops *pci_dma_ops = &dma_direct_ops;
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unsigned long isa_io_base;
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unsigned long pci_dram_offset;
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static int pci_bus_count;
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void set_pci_dma_ops(struct dma_map_ops *dma_ops)
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{
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pci_dma_ops = dma_ops;
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}
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struct dma_map_ops *get_pci_dma_ops(void)
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{
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return pci_dma_ops;
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}
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EXPORT_SYMBOL(get_pci_dma_ops);
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struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
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{
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struct pci_controller *phb;
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*/
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set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
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/* Hook up default DMA ops */
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set_dma_ops(&dev->dev, pci_dma_ops);
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dev->dev.archdata.dma_data = (void *)PCI_DRAM_OFFSET;
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/* Read default IRQs and fixup if necessary */
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dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
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}
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@ -138,9 +138,6 @@ struct platform_device *of_device_alloc(struct device_node *np,
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}
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dev->dev.of_node = of_node_get(np);
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#if defined(CONFIG_MICROBLAZE)
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dev->dev.dma_mask = &dev->archdata.dma_mask;
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#endif
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dev->dev.parent = parent;
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if (bus_id)
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