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arm64: dts: rockchip: correct ep-gpios for rk3399-sapphire
The endpoint control gpio for rk3399-sapphire boards is gpio2_a4, so correct it now. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -457,7 +457,7 @@ &pcie0 {
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assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
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assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
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assigned-clock-rates = <100000000>;
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ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
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ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
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num-lanes = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_clkreqn_cpm>;
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