mirror of https://gitee.com/openkylin/linux.git
phy: qcom-qusb2: add QUSB2 support for IPQ6018
Add the phy init sequence for the Super Speed ports found on IPQ6018. Signed-off-by: Kathiravan T <kathirav@codeaurora.org> [baruch: add ipq6018_regs_layout[], drop binding change] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/b8c22dddf1f70d89e135fe1ae705ddc68e295ebb.1611756920.git.baruch@tkos.co.il Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -22,6 +22,7 @@
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#include <dt-bindings/phy/phy-qcom-qusb2.h>
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#include <dt-bindings/phy/phy-qcom-qusb2.h>
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#define QUSB2PHY_PLL 0x0
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#define QUSB2PHY_PLL_TEST 0x04
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#define QUSB2PHY_PLL_TEST 0x04
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#define CLK_REF_SEL BIT(7)
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#define CLK_REF_SEL BIT(7)
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@ -135,6 +136,35 @@ enum qusb2phy_reg_layout {
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QUSB2PHY_INTR_CTRL,
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QUSB2PHY_INTR_CTRL,
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};
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};
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static const struct qusb2_phy_init_tbl ipq6018_init_tbl[] = {
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QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL, 0x14),
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QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xF8),
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QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0xB3),
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QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE3, 0x83),
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QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0xC0),
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QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TUNE, 0x30),
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QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL1, 0x79),
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QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL2, 0x21),
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QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE5, 0x00),
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QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_PWR_CTRL, 0x00),
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QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TEST2, 0x14),
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QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TEST, 0x80),
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QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_AUTOPGM_CTL1, 0x9F),
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};
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static const unsigned int ipq6018_regs_layout[] = {
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[QUSB2PHY_PLL_STATUS] = 0x38,
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[QUSB2PHY_PORT_TUNE1] = 0x80,
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[QUSB2PHY_PORT_TUNE2] = 0x84,
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[QUSB2PHY_PORT_TUNE3] = 0x88,
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[QUSB2PHY_PORT_TUNE4] = 0x8C,
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[QUSB2PHY_PORT_TUNE5] = 0x90,
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[QUSB2PHY_PORT_TEST1] = 0x98,
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[QUSB2PHY_PORT_TEST2] = 0x9C,
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[QUSB2PHY_PORT_POWERDOWN] = 0xB4,
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[QUSB2PHY_INTR_CTRL] = 0xBC,
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};
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static const unsigned int msm8996_regs_layout[] = {
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static const unsigned int msm8996_regs_layout[] = {
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[QUSB2PHY_PLL_STATUS] = 0x38,
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[QUSB2PHY_PLL_STATUS] = 0x38,
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[QUSB2PHY_PORT_TUNE1] = 0x80,
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[QUSB2PHY_PORT_TUNE1] = 0x80,
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@ -275,6 +305,17 @@ static const struct qusb2_phy_cfg msm8998_phy_cfg = {
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.update_tune1_with_efuse = true,
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.update_tune1_with_efuse = true,
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};
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};
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static const struct qusb2_phy_cfg ipq6018_phy_cfg = {
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.tbl = ipq6018_init_tbl,
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.tbl_num = ARRAY_SIZE(ipq6018_init_tbl),
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.regs = ipq6018_regs_layout,
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.disable_ctrl = POWER_DOWN,
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.mask_core_ready = PLL_LOCKED,
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/* autoresume not used */
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.autoresume_en = BIT(0),
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};
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static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
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static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
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.tbl = qusb2_v2_init_tbl,
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.tbl = qusb2_v2_init_tbl,
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.tbl_num = ARRAY_SIZE(qusb2_v2_init_tbl),
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.tbl_num = ARRAY_SIZE(qusb2_v2_init_tbl),
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@ -833,6 +874,9 @@ static const struct phy_ops qusb2_phy_gen_ops = {
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static const struct of_device_id qusb2_phy_of_match_table[] = {
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static const struct of_device_id qusb2_phy_of_match_table[] = {
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{
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{
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.compatible = "qcom,ipq6018-qusb2-phy",
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.data = &ipq6018_phy_cfg,
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}, {
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.compatible = "qcom,ipq8074-qusb2-phy",
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.compatible = "qcom,ipq8074-qusb2-phy",
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.data = &msm8996_phy_cfg,
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.data = &msm8996_phy_cfg,
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}, {
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}, {
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