mirror of https://gitee.com/openkylin/linux.git
dmaengine: dw: introduce block2bytes() and bytes2block()
The newly introduced helpers prepare driver to support new DMA controller hardware. While here, introduce DWC_CTLH_BLOCK_TS() macro as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -184,6 +184,27 @@ static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc)
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cpu_relax();
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}
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static u32 bytes2block(struct dw_dma_chan *dwc, size_t bytes,
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unsigned int width, size_t *len)
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{
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u32 block;
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if ((bytes >> width) > dwc->block_size) {
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block = dwc->block_size;
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*len = block << width;
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} else {
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block = bytes >> width;
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*len = bytes;
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}
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return block;
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}
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static size_t block2bytes(struct dw_dma_chan *dwc, u32 block, u32 width)
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{
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return DWC_CTLH_BLOCK_TS(block) << width;
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}
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/*----------------------------------------------------------------------*/
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/* Perform single block transfer */
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@ -332,7 +353,7 @@ static inline u32 dwc_get_sent(struct dw_dma_chan *dwc)
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u32 ctlhi = channel_readl(dwc, CTL_HI);
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u32 ctllo = channel_readl(dwc, CTL_LO);
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return (ctlhi & DWC_CTLH_BLOCK_TS_MASK) * (1 << (ctllo >> 4 & 7));
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return block2bytes(dwc, ctlhi, ctllo >> 4 & 7);
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}
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static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
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@ -692,10 +713,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
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| DWC_CTLL_FC_M2M;
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prev = first = NULL;
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for (offset = 0; offset < len; offset += xfer_count << src_width) {
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xfer_count = min_t(size_t, (len - offset) >> src_width,
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dwc->block_size);
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for (offset = 0; offset < len; offset += xfer_count) {
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desc = dwc_desc_get(dwc);
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if (!desc)
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goto err_desc_get;
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@ -703,8 +721,8 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
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lli_write(desc, sar, src + offset);
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lli_write(desc, dar, dest + offset);
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lli_write(desc, ctllo, ctllo);
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lli_write(desc, ctlhi, xfer_count);
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desc->len = xfer_count << src_width;
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lli_write(desc, ctlhi, bytes2block(dwc, len - offset, src_width, &xfer_count));
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desc->len = xfer_count;
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if (!first) {
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first = desc;
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@ -775,7 +793,8 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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for_each_sg(sgl, sg, sg_len, i) {
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struct dw_desc *desc;
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u32 len, dlen, mem;
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u32 len, mem;
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size_t dlen;
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mem = sg_dma_address(sg);
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len = sg_dma_len(sg);
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@ -789,12 +808,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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lli_write(desc, sar, mem);
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lli_write(desc, dar, reg);
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if ((len >> mem_width) > dwc->block_size) {
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dlen = dwc->block_size << mem_width;
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} else {
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dlen = len;
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}
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lli_write(desc, ctlhi, dlen >> mem_width);
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lli_write(desc, ctlhi, bytes2block(dwc, len, mem_width, &dlen));
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lli_write(desc, ctllo, ctllo | DWC_CTLL_SRC_WIDTH(mem_width));
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desc->len = dlen;
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@ -827,7 +841,8 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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for_each_sg(sgl, sg, sg_len, i) {
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struct dw_desc *desc;
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u32 len, dlen, mem;
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u32 len, mem;
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size_t dlen;
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mem = sg_dma_address(sg);
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len = sg_dma_len(sg);
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@ -839,12 +854,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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lli_write(desc, sar, reg);
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lli_write(desc, dar, mem);
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if ((len >> reg_width) > dwc->block_size) {
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dlen = dwc->block_size << reg_width;
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} else {
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dlen = len;
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}
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lli_write(desc, ctlhi, dlen >> reg_width);
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lli_write(desc, ctlhi, bytes2block(dwc, len, reg_width, &dlen));
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mem_width = __ffs(data_width | mem | dlen);
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lli_write(desc, ctllo, ctllo | DWC_CTLL_DST_WIDTH(mem_width));
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desc->len = dlen;
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@ -9,6 +9,7 @@
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* published by the Free Software Foundation.
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*/
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#include <linux/bitops.h>
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#include <linux/interrupt.h>
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#include <linux/dmaengine.h>
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@ -170,8 +171,9 @@ enum dw_dma_msize {
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#define DWC_CTLL_LLP_S_EN (1 << 28) /* src block chain */
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/* Bitfields in CTL_HI */
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#define DWC_CTLH_DONE 0x00001000
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#define DWC_CTLH_BLOCK_TS_MASK 0x00000fff
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#define DWC_CTLH_BLOCK_TS_MASK GENMASK(11, 0)
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#define DWC_CTLH_BLOCK_TS(x) ((x) & DWC_CTLH_BLOCK_TS_MASK)
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#define DWC_CTLH_DONE (1 << 12)
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/* Bitfields in CFG_LO */
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#define DWC_CFGL_CH_PRIOR_MASK (0x7 << 5) /* priority mask */
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