From 2d517508060c22ef371a61495773cf890def291a Mon Sep 17 00:00:00 2001 From: Sudhakar Rajashekhara Date: Wed, 6 Jan 2010 17:28:44 +0530 Subject: [PATCH] davinci: Keep count of channel controllers on a platform Some architectures have only one channel controller, but the edma_alloc_channel api loops twice to findout the free channel available in EDMA_CHANNEL_ANY case. A new variable has been introduced to keep count of number of channel controllers being used on a particular architecture. Signed-off-by: Sudhakar Rajashekhara Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dma.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c index 5a71f4d1c5c5..97a49f98fe13 100644 --- a/arch/arm/mach-davinci/dma.c +++ b/arch/arm/mach-davinci/dma.c @@ -243,6 +243,7 @@ struct edma { }; static struct edma *edma_info[EDMA_MAX_CC]; +static int arch_num_cc; /* dummy param set used to (re)initialize parameter RAM slots */ static const struct edmacc_param dummy_paramset = { @@ -602,7 +603,7 @@ int edma_alloc_channel(int channel, } if (channel < 0) { - for (i = 0; i < EDMA_MAX_CC; i++) { + for (i = 0; i < arch_num_cc; i++) { channel = 0; for (;;) { channel = find_next_bit(edma_info[i]-> @@ -1467,6 +1468,7 @@ static int __init edma_probe(struct platform_device *pdev) edma_write_array2(j, EDMA_DRAE, i, 1, 0x0); edma_write_array(j, EDMA_QRAE, i, 0x0); } + arch_num_cc++; } if (tc_errs_handled) {