- the dts part of the rk3288 smp support

- rate init for rk3288 clocks
 - enablement of various peripherals
 - new boardfile for Haoyu Marsboard (rk3066 based)
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Merge tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "ARM: rockchip: second batch of dts related changes" from Heiko Stuebner:

- the dts part of the rk3288 smp support
- rate init for rk3288 clocks
- enablement of various peripherals
- new boardfile for Haoyu Marsboard (rk3066 based)

* tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: enable PWM on Radxa Rock
  ARM: dts: rockchip: fix invalid unit-address in rk3188.dtsi
  ARM: dts: rk3288: add VOP iommu nodes
  ARM: dts: rockchip: add reset for CPU nodes
  ARM: dts: rockchip: add intmem node for rk3288 smp support
  ARM: dts: rockchip: add pmu references to cpus nodes
  ARM: dts: rockchip: add serial aliases for rk3066 and rk3188
  ARM: dts: rockchip: Add devicetree source for MarsBoard RK3066
  ARM: dts: rockchip: Add EMAC Rockchip for RK3066 SoCs

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2014-11-20 17:42:17 +01:00
commit 2dfb8bf3be
8 changed files with 273 additions and 2 deletions

View File

@ -1,6 +1,10 @@
Rockchip platforms device tree bindings
---------------------------------------
- MarsBoard RK3066 board:
Required root node properties:
- compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
- bq Curie 2 tablet:
Required root node properties:
- compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";

View File

@ -376,6 +376,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
dtb-$(CONFIG_ARCH_REALVIEW) += arm-realview-pb1176.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3066a-bqcurie2.dtb \
rk3066a-marsboard.dtb \
rk3188-radxarock.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb

View File

@ -0,0 +1,192 @@
/*
* Copyright (c) 2014 Romain Perier <romain.perier@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "rk3066a.dtsi"
/ {
model = "MarsBoard RK3066";
compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
memory {
reg = <0x60000000 0x40000000>;
};
vcc_sd0: sdmmc-regulator {
compatible = "regulator-fixed";
regulator-name = "sdmmc-supply";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
interrupt-parent = <&gpio6>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
vcc5-supply = <&vcc_io>;
vcc6-supply = <&vcc_io>;
regulators {
vcc_rtc: regulator@0 {
regulator-name = "vcc_rtc";
regulator-always-on;
};
vcc_io: regulator@1 {
regulator-name = "vcc_io";
regulator-always-on;
};
vdd_arm: regulator@2 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
vcc_ddr: regulator@3 {
regulator-name = "vcc_ddr";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
vcc18_cif: regulator@5 {
regulator-name = "vcc18_cif";
regulator-always-on;
};
vdd_11: regulator@6 {
regulator-name = "vdd_11";
regulator-always-on;
};
vcc_25: regulator@7 {
regulator-name = "vcc_25";
regulator-always-on;
};
vcc_18: regulator@8 {
regulator-name = "vcc_18";
regulator-always-on;
};
vcc25_hdmi: regulator@9 {
regulator-name = "vcc25_hdmi";
regulator-always-on;
};
vcca_33: regulator@10 {
regulator-name = "vcca_33";
regulator-always-on;
};
vcc_rmii: regulator@11 {
regulator-name = "vcc_rmii";
};
vcc28_cif: regulator@12 {
regulator-name = "vcc28_cif";
regulator-always-on;
};
};
};
};
/* must be included after &tps gets defined */
#include "tps65910.dtsi"
&emac {
status = "okay";
phy = <&phy0>;
phy-supply = <&vcc_rmii>;
pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
};
};
&pinctrl {
lan8720a {
phy_int: phy-int {
rockchip,pins = <RK_GPIO1 26 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
&wdt {
status = "okay";
};

View File

@ -234,6 +234,24 @@ pcfg_pull_none: pcfg_pull_none {
bias-disable;
};
emac {
emac_xfer: emac-xfer {
rockchip,pins = <RK_GPIO1 16 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
<RK_GPIO1 17 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
<RK_GPIO1 18 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
<RK_GPIO1 19 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
<RK_GPIO1 20 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
<RK_GPIO1 21 RK_FUNC_2 &pcfg_pull_none>, /* crs_dvalid */
<RK_GPIO1 22 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
<RK_GPIO1 23 RK_FUNC_2 &pcfg_pull_none>; /* rxd0 */
};
emac_mdio: emac-mdio {
rockchip,pins = <RK_GPIO1 24 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */
<RK_GPIO1 25 RK_FUNC_2 &pcfg_pull_none>; /* mac_mdclk */
};
};
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
@ -587,3 +605,7 @@ &uart3 {
&wdt {
compatible = "rockchip,rk3066-wdt", "snps,dw-wdt";
};
&emac {
compatible = "rockchip,rk3066-emac";
};

View File

@ -243,6 +243,18 @@ &mmc0 {
disable-wp;
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm3 {
status = "okay";
};
&pinctrl {
pcfg_output_low: pcfg-output-low {
output-low;

View File

@ -111,7 +111,7 @@ pinctrl: pinctrl {
#size-cells = <1>;
ranges;
gpio0: gpio0@0x2000a000 {
gpio0: gpio0@2000a000 {
compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
@ -124,7 +124,7 @@ gpio0: gpio0@0x2000a000 {
#interrupt-cells = <2>;
};
gpio1: gpio1@0x2003c000 {
gpio1: gpio1@2003c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

View File

@ -46,11 +46,14 @@ aliases {
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "rockchip,rk3066-smp";
rockchip,pmu = <&pmu>;
cpu0: cpu@500 {
device_type = "cpu";
compatible = "arm,cortex-a12";
reg = <0x500>;
resets = <&cru SRST_CORE0>;
operating-points = <
/* KHz uV */
1608000 1350000
@ -73,16 +76,19 @@ cpu@501 {
device_type = "cpu";
compatible = "arm,cortex-a12";
reg = <0x501>;
resets = <&cru SRST_CORE1>;
};
cpu@502 {
device_type = "cpu";
compatible = "arm,cortex-a12";
reg = <0x502>;
resets = <&cru SRST_CORE2>;
};
cpu@503 {
device_type = "cpu";
compatible = "arm,cortex-a12";
reg = <0x503>;
resets = <&cru SRST_CORE3>;
};
};
@ -462,6 +468,18 @@ pwm3: pwm@ff680030 {
status = "disabled";
};
bus_intmem@ff700000 {
compatible = "mmio-sram";
reg = <0xff700000 0x18000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xff700000 0x18000>;
smp-sram@0 {
compatible = "rockchip,rk3066-smp-sram";
reg = <0x00 0x10>;
};
};
pmu: power-management@ff730000 {
compatible = "rockchip,rk3288-pmu", "syscon";
reg = <0xff730000 0x100>;
@ -517,6 +535,24 @@ i2s: i2s@ff890000 {
status = "disabled";
};
vopb_mmu: iommu@ff930300 {
compatible = "rockchip,iommu";
reg = <0xff930300 0x100>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopb_mmu";
#iommu-cells = <0>;
status = "disabled";
};
vopl_mmu: iommu@ff940300 {
compatible = "rockchip,iommu";
reg = <0xff940300 0x100>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopl_mmu";
#iommu-cells = <0>;
status = "disabled";
};
gic: interrupt-controller@ffc01000 {
compatible = "arm,gic-400";
interrupt-controller;

View File

@ -29,6 +29,10 @@ aliases {
mshc0 = &emmc;
mshc1 = &mmc0;
mshc2 = &mmc1;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
spi0 = &spi0;
spi1 = &spi1;
};