mirror of https://gitee.com/openkylin/linux.git
- the dts part of the rk3288 smp support
- rate init for rk3288 clocks - enablement of various peripherals - new boardfile for Haoyu Marsboard (rk3066 based) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCAAGBQJUa1KSAAoJEPOmecmc0R2BuUsIAKC74yQhApYDPib1o8PrtW4I f8N41vfF+zrxUHYOAIZUMCjNuaBBagnvlXe6EmGZ9crQhThMytEKUP4rG2pkScw5 +MKF2aw4sKUHPDDZ0n9VMVMW0i0HfkVlhB921cDfhKVcBpGE44YNusC5+1wsa+8r USGDl0EVTSMyAjXD/ogSqberQBBfFc4eqS0H+ZkCmA/saKa+tLpH0heqY/prq3FU mryXryGIUkCSwN7CB/lt45jT6qfb1UdNOgahK24lt2EmH9R/0IIrqzI8dOf6mnSA lBKnLPazbes0jny2iJSVfNQmlgWodpPY3kNEwxho4LrYhu+sTzW2oKMZrAXTxqY= =j7JA -----END PGP SIGNATURE----- Merge tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "ARM: rockchip: second batch of dts related changes" from Heiko Stuebner: - the dts part of the rk3288 smp support - rate init for rk3288 clocks - enablement of various peripherals - new boardfile for Haoyu Marsboard (rk3066 based) * tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: enable PWM on Radxa Rock ARM: dts: rockchip: fix invalid unit-address in rk3188.dtsi ARM: dts: rk3288: add VOP iommu nodes ARM: dts: rockchip: add reset for CPU nodes ARM: dts: rockchip: add intmem node for rk3288 smp support ARM: dts: rockchip: add pmu references to cpus nodes ARM: dts: rockchip: add serial aliases for rk3066 and rk3188 ARM: dts: rockchip: Add devicetree source for MarsBoard RK3066 ARM: dts: rockchip: Add EMAC Rockchip for RK3066 SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
2dfb8bf3be
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@ -1,6 +1,10 @@
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Rockchip platforms device tree bindings
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---------------------------------------
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- MarsBoard RK3066 board:
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Required root node properties:
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- compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
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- bq Curie 2 tablet:
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Required root node properties:
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- compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";
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@ -376,6 +376,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
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dtb-$(CONFIG_ARCH_REALVIEW) += arm-realview-pb1176.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3066a-bqcurie2.dtb \
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rk3066a-marsboard.dtb \
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rk3188-radxarock.dtb \
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rk3288-evb-act8846.dtb \
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rk3288-evb-rk808.dtb
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@ -0,0 +1,192 @@
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/*
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* Copyright (c) 2014 Romain Perier <romain.perier@gmail.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "rk3066a.dtsi"
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/ {
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model = "MarsBoard RK3066";
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compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
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memory {
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reg = <0x60000000 0x40000000>;
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};
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vcc_sd0: sdmmc-regulator {
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compatible = "regulator-fixed";
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regulator-name = "sdmmc-supply";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
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startup-delay-us = <100000>;
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vin-supply = <&vcc_io>;
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};
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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tps: tps@2d {
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reg = <0x2d>;
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interrupt-parent = <&gpio6>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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vcc5-supply = <&vcc_io>;
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vcc6-supply = <&vcc_io>;
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regulators {
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vcc_rtc: regulator@0 {
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regulator-name = "vcc_rtc";
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regulator-always-on;
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};
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vcc_io: regulator@1 {
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regulator-name = "vcc_io";
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regulator-always-on;
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};
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vdd_arm: regulator@2 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vcc_ddr: regulator@3 {
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regulator-name = "vcc_ddr";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vcc18_cif: regulator@5 {
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regulator-name = "vcc18_cif";
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regulator-always-on;
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};
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vdd_11: regulator@6 {
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regulator-name = "vdd_11";
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regulator-always-on;
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};
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vcc_25: regulator@7 {
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regulator-name = "vcc_25";
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regulator-always-on;
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};
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vcc_18: regulator@8 {
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regulator-name = "vcc_18";
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regulator-always-on;
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};
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vcc25_hdmi: regulator@9 {
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regulator-name = "vcc25_hdmi";
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regulator-always-on;
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};
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vcca_33: regulator@10 {
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regulator-name = "vcca_33";
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regulator-always-on;
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};
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vcc_rmii: regulator@11 {
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regulator-name = "vcc_rmii";
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};
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vcc28_cif: regulator@12 {
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regulator-name = "vcc28_cif";
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regulator-always-on;
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};
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};
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};
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};
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/* must be included after &tps gets defined */
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#include "tps65910.dtsi"
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&emac {
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status = "okay";
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phy = <&phy0>;
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phy-supply = <&vcc_rmii>;
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pinctrl-names = "default";
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pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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interrupt-parent = <&gpio1>;
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interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&pinctrl {
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lan8720a {
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phy_int: phy-int {
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rockchip,pins = <RK_GPIO1 26 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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};
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&wdt {
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status = "okay";
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};
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@ -234,6 +234,24 @@ pcfg_pull_none: pcfg_pull_none {
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bias-disable;
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};
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emac {
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emac_xfer: emac-xfer {
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rockchip,pins = <RK_GPIO1 16 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
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<RK_GPIO1 17 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
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<RK_GPIO1 18 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
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<RK_GPIO1 19 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
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<RK_GPIO1 20 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
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<RK_GPIO1 21 RK_FUNC_2 &pcfg_pull_none>, /* crs_dvalid */
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<RK_GPIO1 22 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
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<RK_GPIO1 23 RK_FUNC_2 &pcfg_pull_none>; /* rxd0 */
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};
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emac_mdio: emac-mdio {
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rockchip,pins = <RK_GPIO1 24 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */
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<RK_GPIO1 25 RK_FUNC_2 &pcfg_pull_none>; /* mac_mdclk */
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};
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};
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emmc {
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emmc_clk: emmc-clk {
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rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
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@ -587,3 +605,7 @@ &uart3 {
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&wdt {
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compatible = "rockchip,rk3066-wdt", "snps,dw-wdt";
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};
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&emac {
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compatible = "rockchip,rk3066-emac";
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};
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@ -243,6 +243,18 @@ &mmc0 {
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disable-wp;
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};
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&pwm1 {
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status = "okay";
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};
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&pwm2 {
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status = "okay";
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};
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&pwm3 {
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status = "okay";
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};
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&pinctrl {
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pcfg_output_low: pcfg-output-low {
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output-low;
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@ -111,7 +111,7 @@ pinctrl: pinctrl {
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#size-cells = <1>;
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ranges;
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gpio0: gpio0@0x2000a000 {
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gpio0: gpio0@2000a000 {
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compatible = "rockchip,rk3188-gpio-bank0";
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reg = <0x2000a000 0x100>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
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@ -124,7 +124,7 @@ gpio0: gpio0@0x2000a000 {
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#interrupt-cells = <2>;
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};
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gpio1: gpio1@0x2003c000 {
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gpio1: gpio1@2003c000 {
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compatible = "rockchip,gpio-bank";
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reg = <0x2003c000 0x100>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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@ -46,11 +46,14 @@ aliases {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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enable-method = "rockchip,rk3066-smp";
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rockchip,pmu = <&pmu>;
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cpu0: cpu@500 {
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device_type = "cpu";
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compatible = "arm,cortex-a12";
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reg = <0x500>;
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resets = <&cru SRST_CORE0>;
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operating-points = <
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/* KHz uV */
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1608000 1350000
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@ -73,16 +76,19 @@ cpu@501 {
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device_type = "cpu";
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compatible = "arm,cortex-a12";
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reg = <0x501>;
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resets = <&cru SRST_CORE1>;
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};
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cpu@502 {
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device_type = "cpu";
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compatible = "arm,cortex-a12";
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reg = <0x502>;
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resets = <&cru SRST_CORE2>;
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};
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cpu@503 {
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device_type = "cpu";
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compatible = "arm,cortex-a12";
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reg = <0x503>;
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resets = <&cru SRST_CORE3>;
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};
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};
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@ -462,6 +468,18 @@ pwm3: pwm@ff680030 {
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status = "disabled";
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};
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bus_intmem@ff700000 {
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compatible = "mmio-sram";
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reg = <0xff700000 0x18000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xff700000 0x18000>;
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smp-sram@0 {
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compatible = "rockchip,rk3066-smp-sram";
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reg = <0x00 0x10>;
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};
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};
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pmu: power-management@ff730000 {
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compatible = "rockchip,rk3288-pmu", "syscon";
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reg = <0xff730000 0x100>;
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@ -517,6 +535,24 @@ i2s: i2s@ff890000 {
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status = "disabled";
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};
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vopb_mmu: iommu@ff930300 {
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compatible = "rockchip,iommu";
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reg = <0xff930300 0x100>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vopb_mmu";
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#iommu-cells = <0>;
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status = "disabled";
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};
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vopl_mmu: iommu@ff940300 {
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compatible = "rockchip,iommu";
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reg = <0xff940300 0x100>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vopl_mmu";
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#iommu-cells = <0>;
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status = "disabled";
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};
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gic: interrupt-controller@ffc01000 {
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compatible = "arm,gic-400";
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interrupt-controller;
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@ -29,6 +29,10 @@ aliases {
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mshc0 = &emmc;
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mshc1 = &mmc0;
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mshc2 = &mmc1;
|
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
|
||||
spi0 = &spi0;
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||||
spi1 = &spi1;
|
||||
};
|
||||
|
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Loading…
Reference in New Issue