mirror of https://gitee.com/openkylin/linux.git
drm/i915/icl: Remove DDI IO power domain from PG3 power domains
The DDI-IO power wells (PWR_WELL_CTL_DDI) are backing the IO/PHY functionality, which doesn't need the PG3 power power well. Accordingly fixing up the list of PG3 power domains. v2: Removed "DDI E/F IO"power domain as well [Imre] Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190811081908.9114-1-anshuman.gupta@intel.com
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@ -2482,15 +2482,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
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BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \
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BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_B_IO) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_C_IO) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
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BIT_ULL(POWER_DOMAIN_AUX_B) | \
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BIT_ULL(POWER_DOMAIN_AUX_C) | \
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BIT_ULL(POWER_DOMAIN_AUX_D) | \
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