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drm/radeon: make sa bo a stand alone object 

Allocating and freeing it seperately.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Christian König 2012-05-09 15:34:53 +02:00 committed by Dave Airlie
parent e6661a9664
commit 2e0d99103e
7 changed files with 32 additions and 22 deletions
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4
drivers/gpu/drm/radeon/radeon.h
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@ -638,7 +638,7 @@ void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc);
*/ */
struct radeon_ib { struct radeon_ib {
struct radeon_sa_bo sa_bo; struct radeon_sa_bo *sa_bo;
unsigned idx; unsigned idx;
uint32_t length_dw; uint32_t length_dw;
uint64_t gpu_addr; uint64_t gpu_addr;
@ -693,7 +693,7 @@ struct radeon_vm {
unsigned last_pfn; unsigned last_pfn;
u64 pt_gpu_addr; u64 pt_gpu_addr;
u64 *pt; u64 *pt;
struct radeon_sa_bo sa_bo; struct radeon_sa_bo *sa_bo;
struct mutex mutex; struct mutex mutex;
/* last fence for cs using this vm */ /* last fence for cs using this vm */
struct radeon_fence *fence; struct radeon_fence *fence;

4
drivers/gpu/drm/radeon/radeon_cs.c
View File

@ -477,7 +477,7 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
/* ib pool is bind at 0 in virtual address space to gpu_addr is the /* ib pool is bind at 0 in virtual address space to gpu_addr is the
* offset inside the pool bo * offset inside the pool bo
*/ */
parser->const_ib->gpu_addr = parser->const_ib->sa_bo.soffset; parser->const_ib->gpu_addr = parser->const_ib->sa_bo->soffset;
r = radeon_ib_schedule(rdev, parser->const_ib); r = radeon_ib_schedule(rdev, parser->const_ib);
if (r) if (r)
goto out; goto out;
@ -487,7 +487,7 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
/* ib pool is bind at 0 in virtual address space to gpu_addr is the /* ib pool is bind at 0 in virtual address space to gpu_addr is the
* offset inside the pool bo * offset inside the pool bo
*/ */
parser->ib->gpu_addr = parser->ib->sa_bo.soffset; parser->ib->gpu_addr = parser->ib->sa_bo->soffset;
parser->ib->is_const_ib = false; parser->ib->is_const_ib = false;
r = radeon_ib_schedule(rdev, parser->ib); r = radeon_ib_schedule(rdev, parser->ib);
out: out:

4
drivers/gpu/drm/radeon/radeon_gart.c
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@ -404,8 +404,8 @@ int radeon_vm_bind(struct radeon_device *rdev, struct radeon_vm *vm)
radeon_vm_unbind(rdev, vm_evict); radeon_vm_unbind(rdev, vm_evict);
goto retry; goto retry;
} }
vm->pt = radeon_sa_bo_cpu_addr(&vm->sa_bo); vm->pt = radeon_sa_bo_cpu_addr(vm->sa_bo);
vm->pt_gpu_addr = radeon_sa_bo_gpu_addr(&vm->sa_bo); vm->pt_gpu_addr = radeon_sa_bo_gpu_addr(vm->sa_bo);
memset(vm->pt, 0, RADEON_GPU_PAGE_ALIGN(vm->last_pfn * 8)); memset(vm->pt, 0, RADEON_GPU_PAGE_ALIGN(vm->last_pfn * 8));
retry_id: retry_id:

4
drivers/gpu/drm/radeon/radeon_object.h
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@ -168,10 +168,10 @@ extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
struct radeon_sa_manager *sa_manager); struct radeon_sa_manager *sa_manager);
extern int radeon_sa_bo_new(struct radeon_device *rdev, extern int radeon_sa_bo_new(struct radeon_device *rdev,
struct radeon_sa_manager *sa_manager, struct radeon_sa_manager *sa_manager,
struct radeon_sa_bo *sa_bo, struct radeon_sa_bo **sa_bo,
unsigned size, unsigned align); unsigned size, unsigned align);
extern void radeon_sa_bo_free(struct radeon_device *rdev, extern void radeon_sa_bo_free(struct radeon_device *rdev,
struct radeon_sa_bo *sa_bo); struct radeon_sa_bo **sa_bo);
#if defined(CONFIG_DEBUG_FS) #if defined(CONFIG_DEBUG_FS)
extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager, extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
struct seq_file *m); struct seq_file *m);

6
drivers/gpu/drm/radeon/radeon_ring.c
View File

@ -127,8 +127,8 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
size, 256); size, 256);
if (!r) { if (!r) {
*ib = &rdev->ib_pool.ibs[idx]; *ib = &rdev->ib_pool.ibs[idx];
(*ib)->ptr = radeon_sa_bo_cpu_addr(&(*ib)->sa_bo); (*ib)->ptr = radeon_sa_bo_cpu_addr((*ib)->sa_bo);
(*ib)->gpu_addr = radeon_sa_bo_gpu_addr(&(*ib)->sa_bo); (*ib)->gpu_addr = radeon_sa_bo_gpu_addr((*ib)->sa_bo);
(*ib)->fence = fence; (*ib)->fence = fence;
(*ib)->vm_id = 0; (*ib)->vm_id = 0;
(*ib)->is_const_ib = false; (*ib)->is_const_ib = false;
@ -227,7 +227,7 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
rdev->ib_pool.ibs[i].fence = NULL; rdev->ib_pool.ibs[i].fence = NULL;
rdev->ib_pool.ibs[i].idx = i; rdev->ib_pool.ibs[i].idx = i;
rdev->ib_pool.ibs[i].length_dw = 0; rdev->ib_pool.ibs[i].length_dw = 0;
INIT_LIST_HEAD(&rdev->ib_pool.ibs[i].sa_bo.list); rdev->ib_pool.ibs[i].sa_bo = NULL;
} }
rdev->ib_pool.head_id = 0; rdev->ib_pool.head_id = 0;
rdev->ib_pool.ready = true; rdev->ib_pool.ready = true;

28
drivers/gpu/drm/radeon/radeon_sa.c
View File

@ -131,7 +131,7 @@ int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
*/ */
int radeon_sa_bo_new(struct radeon_device *rdev, int radeon_sa_bo_new(struct radeon_device *rdev,
struct radeon_sa_manager *sa_manager, struct radeon_sa_manager *sa_manager,
struct radeon_sa_bo *sa_bo, struct radeon_sa_bo **sa_bo,
unsigned size, unsigned align) unsigned size, unsigned align)
{ {
struct radeon_sa_bo *tmp; struct radeon_sa_bo *tmp;
@ -140,6 +140,9 @@ int radeon_sa_bo_new(struct radeon_device *rdev,
BUG_ON(align > RADEON_GPU_PAGE_SIZE); BUG_ON(align > RADEON_GPU_PAGE_SIZE);
BUG_ON(size > sa_manager->size); BUG_ON(size > sa_manager->size);
*sa_bo = kmalloc(sizeof(struct radeon_sa_bo), GFP_KERNEL);
spin_lock(&sa_manager->lock); spin_lock(&sa_manager->lock);
/* no one ? */ /* no one ? */
@ -175,23 +178,30 @@ int radeon_sa_bo_new(struct radeon_device *rdev,
if ((sa_manager->size - offset) < size) { if ((sa_manager->size - offset) < size) {
/* failed to find somethings big enough */ /* failed to find somethings big enough */
spin_unlock(&sa_manager->lock); spin_unlock(&sa_manager->lock);
kfree(*sa_bo);
*sa_bo = NULL;
return -ENOMEM; return -ENOMEM;
} }
out: out:
sa_bo->manager = sa_manager; (*sa_bo)->manager = sa_manager;
sa_bo->soffset = offset; (*sa_bo)->soffset = offset;
sa_bo->eoffset = offset + size; (*sa_bo)->eoffset = offset + size;
list_add(&sa_bo->list, head); list_add(&(*sa_bo)->list, head);
spin_unlock(&sa_manager->lock); spin_unlock(&sa_manager->lock);
return 0; return 0;
} }
void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo *sa_bo) void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo)
{ {
spin_lock(&sa_bo->manager->lock); if (!sa_bo || !*sa_bo)
list_del_init(&sa_bo->list); return;
spin_unlock(&sa_bo->manager->lock);
spin_lock(&(*sa_bo)->manager->lock);
list_del_init(&(*sa_bo)->list);
spin_unlock(&(*sa_bo)->manager->lock);
kfree(*sa_bo);
*sa_bo = NULL;
} }
#if defined(CONFIG_DEBUG_FS) #if defined(CONFIG_DEBUG_FS)

4
drivers/gpu/drm/radeon/radeon_semaphore.c
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@ -53,8 +53,8 @@ static int radeon_semaphore_add_bo(struct radeon_device *rdev)
kfree(bo); kfree(bo);
return r; return r;
} }
gpu_addr = radeon_sa_bo_gpu_addr(&bo->ib->sa_bo); gpu_addr = radeon_sa_bo_gpu_addr(bo->ib->sa_bo);
cpu_ptr = radeon_sa_bo_cpu_addr(&bo->ib->sa_bo); cpu_ptr = radeon_sa_bo_cpu_addr(bo->ib->sa_bo);
for (i = 0; i < (RADEON_SEMAPHORE_BO_SIZE/8); i++) { for (i = 0; i < (RADEON_SEMAPHORE_BO_SIZE/8); i++) {
bo->semaphores[i].gpu_addr = gpu_addr; bo->semaphores[i].gpu_addr = gpu_addr;
bo->semaphores[i].cpu_ptr = cpu_ptr; bo->semaphores[i].cpu_ptr = cpu_ptr;