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ARM: OMAP2+: nand: unify init functions
Helper function for updating nand platform data has been added the capability to take timing structure arguement. Usage of omap_nand_flash_init() has been replaced by modifed one, omap_nand_flash_init was doing things similar to board_nand_init except that NAND CS# were being acquired based on bootloader setting. As CS# is hardwired for a given board, acquiring gpmc CS# has been removed, and updated with the value on board. NAND CS# used in beagle board & omap3evm was found to be CS0. Thomas Weber <thomas.weber.linux@googlemail.com> reported that value of devkit8000 to be CS0. Overo board was found to be using CS0 based on u-boot, while google grep says omap3touchbook too has CS0. Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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@ -55,8 +55,11 @@
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#include "sdram-micron-mt46h32m32lf-6.h"
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#include "mux.h"
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#include "hsmmc.h"
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#include "board-flash.h"
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#include "common-board-devices.h"
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#define NAND_CS 0
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#define OMAP_DM9000_GPIO_IRQ 25
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#define OMAP3_DEVKIT_TS_GPIO 27
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@ -621,8 +624,9 @@ static void __init devkit8000_init(void)
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usb_musb_init(NULL);
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usbhs_init(&usbhs_bdata);
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omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
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ARRAY_SIZE(devkit8000_nand_partitions));
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board_nand_init(devkit8000_nand_partitions,
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ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS,
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NAND_BUSWIDTH_16, NULL);
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omap_twl4030_audio_init("omap3beagle");
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/* Ensure SDRC pins are mux'd for self-refresh */
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@ -104,41 +104,41 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,
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defined(CONFIG_MTD_NAND_OMAP2_MODULE)
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/* Note that all values in this struct are in nanoseconds */
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static struct gpmc_timings nand_timings = {
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struct gpmc_timings nand_default_timings[1] = {
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{
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.sync_clk = 0,
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.sync_clk = 0,
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.cs_on = 0,
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.cs_rd_off = 36,
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.cs_wr_off = 36,
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.cs_on = 0,
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.cs_rd_off = 36,
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.cs_wr_off = 36,
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.adv_on = 6,
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.adv_rd_off = 24,
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.adv_wr_off = 36,
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.adv_on = 6,
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.adv_rd_off = 24,
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.adv_wr_off = 36,
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.we_off = 30,
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.oe_off = 48,
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.we_off = 30,
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.oe_off = 48,
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.access = 54,
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.rd_cycle = 72,
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.wr_cycle = 72,
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.access = 54,
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.rd_cycle = 72,
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.wr_cycle = 72,
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.wr_access = 30,
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.wr_data_mux_bus = 0,
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.wr_access = 30,
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.wr_data_mux_bus = 0,
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},
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};
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static struct omap_nand_platform_data board_nand_data = {
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.gpmc_t = &nand_timings,
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};
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static struct omap_nand_platform_data board_nand_data;
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void
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__init board_nand_init(struct mtd_partition *nand_parts,
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u8 nr_parts, u8 cs, int nand_type)
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__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
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int nand_type, struct gpmc_timings *gpmc_t)
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{
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board_nand_data.cs = cs;
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board_nand_data.parts = nand_parts;
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board_nand_data.nr_parts = nr_parts;
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board_nand_data.devsize = nand_type;
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board_nand_data.gpmc_t = gpmc_t;
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board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
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gpmc_nand_init(&board_nand_data);
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@ -238,5 +238,6 @@ void __init board_flash_init(struct flash_partitions partition_info[],
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pr_err("NAND: Unable to find configuration in GPMC\n");
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else
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board_nand_init(partition_info[2].parts,
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partition_info[2].nr_parts, nandcs, nand_type);
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partition_info[2].nr_parts, nandcs,
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nand_type, nand_default_timings);
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}
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@ -40,12 +40,14 @@ static inline void board_flash_init(struct flash_partitions part[],
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#if defined(CONFIG_MTD_NAND_OMAP2) || \
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defined(CONFIG_MTD_NAND_OMAP2_MODULE)
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extern void board_nand_init(struct mtd_partition *nand_parts,
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u8 nr_parts, u8 cs, int nand_type);
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u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t);
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extern struct gpmc_timings nand_default_timings[];
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#else
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static inline void board_nand_init(struct mtd_partition *nand_parts,
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u8 nr_parts, u8 cs, int nand_type)
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u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t)
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{
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}
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#define nand_default_timings NULL
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#endif
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#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
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@ -175,7 +175,7 @@ static void __init igep_flash_init(void)
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pr_info("IGEP: initializing NAND memory device\n");
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board_nand_init(igep_flash_partitions,
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ARRAY_SIZE(igep_flash_partitions),
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0, NAND_BUSWIDTH_16);
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0, NAND_BUSWIDTH_16, nand_default_timings);
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} else if (mux == IGEP_SYSBOOT_ONENAND) {
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pr_info("IGEP: initializing OneNAND memory device\n");
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board_onenand_init(igep_flash_partitions,
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@ -420,8 +420,8 @@ static void __init omap_ldp_init(void)
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omap_serial_init();
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omap_sdrc_init(NULL, NULL);
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usb_musb_init(NULL);
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board_nand_init(ldp_nand_partitions,
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ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
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board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions),
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ZOOM_NAND_CS, 0, nand_default_timings);
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omap_hsmmc_init(mmc);
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ldp_display_init();
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@ -49,8 +49,11 @@
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#include "mux.h"
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#include "hsmmc.h"
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#include "pm.h"
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#include "board-flash.h"
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#include "common-board-devices.h"
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#define NAND_CS 0
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/*
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* OMAP3 Beagle revision
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* Run time detection of Beagle revision is done by reading GPIO.
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@ -512,8 +515,9 @@ static void __init omap3_beagle_init(void)
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usb_musb_init(NULL);
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usbhs_init(&usbhs_bdata);
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omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
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ARRAY_SIZE(omap3beagle_nand_partitions));
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board_nand_init(omap3beagle_nand_partitions,
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ARRAY_SIZE(omap3beagle_nand_partitions), NAND_CS,
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NAND_BUSWIDTH_16, NULL);
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omap_twl4030_audio_init("omap3beagle");
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/* Ensure msecure is mux'd to be able to set the RTC. */
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@ -56,6 +56,9 @@
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#include "sdram-micron-mt46h32m32lf-6.h"
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#include "hsmmc.h"
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#include "common-board-devices.h"
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#include "board-flash.h"
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#define NAND_CS 0
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#define OMAP3_EVM_TS_GPIO 175
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#define OMAP3_EVM_EHCI_VBUS 22
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@ -731,8 +734,9 @@ static void __init omap3_evm_init(void)
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}
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usb_musb_init(&musb_board_data);
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usbhs_init(&usbhs_bdata);
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omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions,
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ARRAY_SIZE(omap3evm_nand_partitions));
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board_nand_init(omap3evm_nand_partitions,
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ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
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NAND_BUSWIDTH_16, NULL);
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omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
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omap3evm_init_smsc911x();
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@ -50,6 +50,7 @@
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#include "mux.h"
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#include "hsmmc.h"
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#include "board-flash.h"
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#include "common-board-devices.h"
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#include <asm/setup.h>
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@ -59,6 +60,8 @@
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#define TB_BL_PWM_TIMER 9
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#define TB_KILL_POWER_GPIO 168
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#define NAND_CS 0
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static unsigned long touchbook_revision;
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static struct mtd_partition omap3touchbook_nand_partitions[] = {
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@ -365,8 +368,9 @@ static void __init omap3_touchbook_init(void)
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omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata);
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usb_musb_init(NULL);
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usbhs_init(&usbhs_bdata);
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omap_nand_flash_init(NAND_BUSWIDTH_16, omap3touchbook_nand_partitions,
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ARRAY_SIZE(omap3touchbook_nand_partitions));
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board_nand_init(omap3touchbook_nand_partitions,
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ARRAY_SIZE(omap3touchbook_nand_partitions), NAND_CS,
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NAND_BUSWIDTH_16, NULL);
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/* Ensure SDRC pins are mux'd for self-refresh */
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omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
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@ -55,8 +55,11 @@
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#include "mux.h"
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#include "sdram-micron-mt46h32m32lf-6.h"
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#include "hsmmc.h"
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#include "board-flash.h"
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#include "common-board-devices.h"
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#define NAND_CS 0
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#define OVERO_GPIO_BT_XGATE 15
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#define OVERO_GPIO_W2W_NRESET 16
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#define OVERO_GPIO_PENDOWN 114
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@ -495,8 +498,8 @@ static void __init overo_init(void)
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omap_serial_init();
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omap_sdrc_init(mt46h32m32lf6_sdrc_params,
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mt46h32m32lf6_sdrc_params);
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omap_nand_flash_init(0, overo_nand_partitions,
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ARRAY_SIZE(overo_nand_partitions));
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board_nand_init(overo_nand_partitions,
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ARRAY_SIZE(overo_nand_partitions), NAND_CS, 0, NULL);
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usb_musb_init(NULL);
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usbhs_init(&usbhs_bdata);
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overo_spi_init();
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@ -113,8 +113,9 @@ static void __init omap_zoom_init(void)
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usbhs_init(&usbhs_bdata);
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}
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board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions),
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ZOOM_NAND_CS, NAND_BUSWIDTH_16);
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board_nand_init(zoom_nand_partitions,
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ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS,
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NAND_BUSWIDTH_16, nand_default_timings);
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zoom_debugboard_init();
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zoom_peripherals_init();
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@ -96,48 +96,3 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
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{
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}
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#endif
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#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
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static struct omap_nand_platform_data nand_data;
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void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
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int nr_parts)
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{
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u8 cs = 0;
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u8 nandcs = GPMC_CS_NUM + 1;
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/* find out the chip-select on which NAND exists */
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while (cs < GPMC_CS_NUM) {
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u32 ret = 0;
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ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
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if ((ret & 0xC00) == 0x800) {
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printk(KERN_INFO "Found NAND on CS%d\n", cs);
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if (nandcs > GPMC_CS_NUM)
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nandcs = cs;
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}
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cs++;
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}
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if (nandcs > GPMC_CS_NUM) {
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pr_info("NAND: Unable to find configuration in GPMC\n");
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return;
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}
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if (nandcs < GPMC_CS_NUM) {
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nand_data.cs = nandcs;
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nand_data.parts = parts;
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nand_data.nr_parts = nr_parts;
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nand_data.devsize = options;
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printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
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if (gpmc_nand_init(&nand_data) < 0)
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printk(KERN_ERR "Unable to register NAND device\n");
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}
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}
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#else
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void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
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int nr_parts)
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{
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}
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#endif
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@ -10,6 +10,5 @@ struct ads7846_platform_data;
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void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
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struct ads7846_platform_data *board_pdata);
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void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts);
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#endif /* __OMAP_COMMON_BOARD_DEVICES__ */
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