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x86, apic: remove no_balance_irq and no_ioapic_check flags 

These flags are completely unused. (the in-kernel IRQ balancer has
been removed from the upstream kernel.)

Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Ingo Molnar 2009-01-28 05:57:56 +01:00
parent d1d7cae8fd
commit 2e867b17cc
16 changed files with 0 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/x86/include/asm/bigsmp/apic.h
View File

@ -18,7 +18,6 @@ static inline const cpumask_t *bigsmp_target_cpus(void)
}
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#define NO_BALANCE_IRQ (0)
static inline unsigned long
bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)

2
arch/x86/include/asm/es7000/apic.h
View File

@ -23,10 +23,8 @@ static inline const cpumask_t *es7000_target_cpus(void)
#define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER)
#define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio)
#define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */
#define NO_BALANCE_IRQ_CLUSTER (1)
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#define NO_BALANCE_IRQ (0)
static inline unsigned long
es7000_check_apicid_used(physid_mask_t bitmap, int apicid)

3
arch/x86/include/asm/genapic.h
View File

@ -34,9 +34,6 @@ struct genapic {
unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
unsigned long (*check_apicid_present)(int apicid);
int no_balance_irq;
int no_ioapic_check;
void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
void (*init_apic_ldr)(void);

2
arch/x86/include/asm/mach-default/mach_apic.h
View File

@ -17,8 +17,6 @@ static inline const struct cpumask *default_target_cpus(void)
#endif
}
#define NO_BALANCE_IRQ (0)
#ifdef CONFIG_X86_64
#include <asm/genapic.h>
#define init_apic_ldr (apic->init_apic_ldr)

1
arch/x86/include/asm/mach-generic/mach_apic.h
View File

@ -3,7 +3,6 @@
#include <asm/genapic.h>
#define NO_BALANCE_IRQ (apic->no_balance_irq)
#define init_apic_ldr (apic->init_apic_ldr)
#define ioapic_phys_id_map (apic->ioapic_phys_id_map)
#define setup_apic_routing (apic->setup_apic_routing)

2
arch/x86/include/asm/numaq/apic.h
View File

@ -12,8 +12,6 @@ static inline const cpumask_t *numaq_target_cpus(void)
return &CPU_MASK_ALL;
}
#define NO_BALANCE_IRQ (1)
static inline unsigned long
numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
{

2
arch/x86/include/asm/summit/apic.h
View File

@ -4,8 +4,6 @@
#include <asm/smp.h>
#include <linux/gfp.h>
#define NO_BALANCE_IRQ (0)
/* In clustered mode, the high nibble of APIC ID is a cluster number.
* The low nibble is a 4-bit bitmap. */
#define XAPIC_DEST_CPUS_SHIFT 4

6
arch/x86/kernel/genapic_flat_64.c
View File

@ -189,9 +189,6 @@ struct genapic apic_flat = {
.check_apicid_used = NULL,
.check_apicid_present = NULL,
.no_balance_irq = 0,
.no_ioapic_check = 0,
.vector_allocation_domain = flat_vector_allocation_domain,
.init_apic_ldr = flat_init_apic_ldr,
@ -335,9 +332,6 @@ struct genapic apic_physflat = {
.check_apicid_used = NULL,
.check_apicid_present = NULL,
.no_balance_irq = 0,
.no_ioapic_check = 0,
.vector_allocation_domain = physflat_vector_allocation_domain,
/* not needed, but shouldn't hurt: */
.init_apic_ldr = flat_init_apic_ldr,

3
arch/x86/kernel/genx2apic_cluster.c
View File

@ -191,9 +191,6 @@ struct genapic apic_x2apic_cluster = {
.check_apicid_used = NULL,
.check_apicid_present = NULL,
.no_balance_irq = 0,
.no_ioapic_check = 0,
.vector_allocation_domain = x2apic_vector_allocation_domain,
.init_apic_ldr = init_x2apic_ldr,

3
arch/x86/kernel/genx2apic_phys.c
View File

@ -187,9 +187,6 @@ struct genapic apic_x2apic_phys = {
.check_apicid_used = NULL,
.check_apicid_present = NULL,
.no_balance_irq = 0,
.no_ioapic_check = 0,
.vector_allocation_domain = x2apic_vector_allocation_domain,
.init_apic_ldr = init_x2apic_ldr,

3
arch/x86/kernel/genx2apic_uv_x.c
View File

@ -252,9 +252,6 @@ struct genapic apic_x2apic_uv_x = {
.check_apicid_used = NULL,
.check_apicid_present = NULL,
.no_balance_irq = 0,
.no_ioapic_check = 0,
.vector_allocation_domain = uv_vector_allocation_domain,
.init_apic_ldr = uv_init_apic_ldr,

3
arch/x86/mach-generic/bigsmp.c
View File

@ -74,9 +74,6 @@ struct genapic apic_bigsmp = {
.check_apicid_used = bigsmp_check_apicid_used,
.check_apicid_present = bigsmp_check_apicid_present,
.no_balance_irq = NO_BALANCE_IRQ,
.no_ioapic_check = 0,
.vector_allocation_domain = vector_allocation_domain,
.init_apic_ldr = init_apic_ldr,

3
arch/x86/mach-generic/default.c
View File

@ -41,9 +41,6 @@ struct genapic apic_default = {
.check_apicid_used = default_check_apicid_used,
.check_apicid_present = default_check_apicid_present,
.no_balance_irq = NO_BALANCE_IRQ,
.no_ioapic_check = 0,
.vector_allocation_domain = vector_allocation_domain,
.init_apic_ldr = init_apic_ldr,

4
arch/x86/mach-generic/es7000.c
View File

@ -23,7 +23,6 @@ void __init es7000_update_genapic_to_cluster(void)
apic->target_cpus = target_cpus_cluster;
apic->irq_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
apic->irq_dest_mode = INT_DEST_MODE_CLUSTER;
apic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER;
apic->init_apic_ldr = init_apic_ldr_cluster;
@ -117,9 +116,6 @@ struct genapic apic_es7000 = {
.check_apicid_used = es7000_check_apicid_used,
.check_apicid_present = es7000_check_apicid_present,
.no_balance_irq = NO_BALANCE_IRQ,
.no_ioapic_check = 0,
.vector_allocation_domain = vector_allocation_domain,
.init_apic_ldr = init_apic_ldr,

3
arch/x86/mach-generic/numaq.c
View File

@ -61,9 +61,6 @@ struct genapic apic_numaq = {
.check_apicid_used = numaq_check_apicid_used,
.check_apicid_present = numaq_check_apicid_present,
.no_balance_irq = NO_BALANCE_IRQ,
.no_ioapic_check = 0,
.vector_allocation_domain = vector_allocation_domain,
.init_apic_ldr = init_apic_ldr,

3
arch/x86/mach-generic/summit.c
View File

@ -54,9 +54,6 @@ struct genapic apic_summit = {
.check_apicid_used = summit_check_apicid_used,
.check_apicid_present = summit_check_apicid_present,
.no_balance_irq = NO_BALANCE_IRQ,
.no_ioapic_check = 0,
.vector_allocation_domain = vector_allocation_domain,
.init_apic_ldr = init_apic_ldr,