mirror of https://gitee.com/openkylin/linux.git
Merge series "spi: stm32-qspi: Fix and update" from <patrice.chotard@foss.st.com>
Patrice Chotard <patrice.chotard@foss.st.com>: From: Patrice Chotard <patrice.chotard@foss.st.com> Christophe Kerello (1): spi: stm32-qspi: fix pm_runtime usage_count counter Patrice Chotard (2): spi: stm32-qspi: Trigger DMA only if more than 4 bytes to transfer spi: stm32-qspi: Add dirmap support drivers/spi/spi-stm32-qspi.c | 106 +++++++++++++++++++++++++++-------- 1 file changed, 84 insertions(+), 22 deletions(-) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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commit
2e9f02689e
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@ -269,8 +269,9 @@ static int stm32_qspi_tx(struct stm32_qspi *qspi, const struct spi_mem_op *op)
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if (qspi->fmode == CCR_FMODE_MM)
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return stm32_qspi_tx_mm(qspi, op);
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else if ((op->data.dir == SPI_MEM_DATA_IN && qspi->dma_chrx) ||
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(op->data.dir == SPI_MEM_DATA_OUT && qspi->dma_chtx))
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else if (((op->data.dir == SPI_MEM_DATA_IN && qspi->dma_chrx) ||
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(op->data.dir == SPI_MEM_DATA_OUT && qspi->dma_chtx)) &&
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op->data.nbytes > 4)
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if (!stm32_qspi_tx_dma(qspi, op))
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return 0;
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@ -330,7 +331,7 @@ static int stm32_qspi_send(struct spi_mem *mem, const struct spi_mem_op *op)
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{
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struct stm32_qspi *qspi = spi_controller_get_devdata(mem->spi->master);
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struct stm32_qspi_flash *flash = &qspi->flash[mem->spi->chip_select];
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u32 ccr, cr, addr_max;
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u32 ccr, cr;
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int timeout, err = 0;
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dev_dbg(qspi->dev, "cmd:%#x mode:%d.%d.%d.%d addr:%#llx len:%#x\n",
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@ -342,18 +343,6 @@ static int stm32_qspi_send(struct spi_mem *mem, const struct spi_mem_op *op)
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if (err)
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goto abort;
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addr_max = op->addr.val + op->data.nbytes + 1;
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if (op->data.dir == SPI_MEM_DATA_IN) {
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if (addr_max < qspi->mm_size &&
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op->addr.buswidth)
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qspi->fmode = CCR_FMODE_MM;
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else
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qspi->fmode = CCR_FMODE_INDR;
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} else {
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qspi->fmode = CCR_FMODE_INDW;
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}
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cr = readl_relaxed(qspi->io_base + QSPI_CR);
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cr &= ~CR_PRESC_MASK & ~CR_FSEL;
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cr |= FIELD_PREP(CR_PRESC_MASK, flash->presc);
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@ -363,8 +352,6 @@ static int stm32_qspi_send(struct spi_mem *mem, const struct spi_mem_op *op)
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if (op->data.nbytes)
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writel_relaxed(op->data.nbytes - 1,
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qspi->io_base + QSPI_DLR);
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else
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qspi->fmode = CCR_FMODE_INDW;
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ccr = qspi->fmode;
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ccr |= FIELD_PREP(CCR_INST_MASK, op->cmd.opcode);
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@ -440,6 +427,11 @@ static int stm32_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
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}
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mutex_lock(&qspi->lock);
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if (op->data.dir == SPI_MEM_DATA_IN && op->data.nbytes)
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qspi->fmode = CCR_FMODE_INDR;
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else
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qspi->fmode = CCR_FMODE_INDW;
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ret = stm32_qspi_send(mem, op);
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mutex_unlock(&qspi->lock);
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@ -449,6 +441,64 @@ static int stm32_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
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return ret;
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}
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static int stm32_qspi_dirmap_create(struct spi_mem_dirmap_desc *desc)
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{
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struct stm32_qspi *qspi = spi_controller_get_devdata(desc->mem->spi->master);
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if (desc->info.op_tmpl.data.dir == SPI_MEM_DATA_OUT)
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return -EOPNOTSUPP;
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/* should never happen, as mm_base == null is an error probe exit condition */
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if (!qspi->mm_base && desc->info.op_tmpl.data.dir == SPI_MEM_DATA_IN)
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return -EOPNOTSUPP;
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if (!qspi->mm_size)
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return -EOPNOTSUPP;
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return 0;
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}
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static ssize_t stm32_qspi_dirmap_read(struct spi_mem_dirmap_desc *desc,
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u64 offs, size_t len, void *buf)
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{
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struct stm32_qspi *qspi = spi_controller_get_devdata(desc->mem->spi->master);
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struct spi_mem_op op;
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u32 addr_max;
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int ret;
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ret = pm_runtime_get_sync(qspi->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(qspi->dev);
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return ret;
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}
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mutex_lock(&qspi->lock);
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/* make a local copy of desc op_tmpl and complete dirmap rdesc
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* spi_mem_op template with offs, len and *buf in order to get
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* all needed transfer information into struct spi_mem_op
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*/
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memcpy(&op, &desc->info.op_tmpl, sizeof(struct spi_mem_op));
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dev_dbg(qspi->dev, "%s len = 0x%x offs = 0x%llx buf = 0x%p\n", __func__, len, offs, buf);
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op.data.nbytes = len;
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op.addr.val = desc->info.offset + offs;
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op.data.buf.in = buf;
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addr_max = op.addr.val + op.data.nbytes + 1;
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if (addr_max < qspi->mm_size && op.addr.buswidth)
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qspi->fmode = CCR_FMODE_MM;
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else
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qspi->fmode = CCR_FMODE_INDR;
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ret = stm32_qspi_send(desc->mem, &op);
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mutex_unlock(&qspi->lock);
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pm_runtime_mark_last_busy(qspi->dev);
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pm_runtime_put_autosuspend(qspi->dev);
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return ret ?: len;
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}
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static int stm32_qspi_setup(struct spi_device *spi)
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{
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struct spi_controller *ctrl = spi->master;
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@ -554,7 +604,9 @@ static void stm32_qspi_dma_free(struct stm32_qspi *qspi)
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* to check supported mode.
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*/
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static const struct spi_controller_mem_ops stm32_qspi_mem_ops = {
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.exec_op = stm32_qspi_exec_op,
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.exec_op = stm32_qspi_exec_op,
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.dirmap_create = stm32_qspi_dirmap_create,
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.dirmap_read = stm32_qspi_dirmap_read,
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};
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static int stm32_qspi_probe(struct platform_device *pdev)
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@ -727,21 +779,31 @@ static int __maybe_unused stm32_qspi_suspend(struct device *dev)
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{
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pinctrl_pm_select_sleep_state(dev);
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return 0;
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return pm_runtime_force_suspend(dev);
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}
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static int __maybe_unused stm32_qspi_resume(struct device *dev)
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{
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struct stm32_qspi *qspi = dev_get_drvdata(dev);
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int ret;
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ret = pm_runtime_force_resume(dev);
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if (ret < 0)
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return ret;
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pinctrl_pm_select_default_state(dev);
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clk_prepare_enable(qspi->clk);
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ret = pm_runtime_get_sync(dev);
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if (ret < 0) {
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pm_runtime_put_noidle(dev);
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return ret;
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}
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writel_relaxed(qspi->cr_reg, qspi->io_base + QSPI_CR);
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writel_relaxed(qspi->dcr_reg, qspi->io_base + QSPI_DCR);
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pm_runtime_mark_last_busy(qspi->dev);
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pm_runtime_put_autosuspend(qspi->dev);
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pm_runtime_mark_last_busy(dev);
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pm_runtime_put_autosuspend(dev);
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return 0;
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}
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