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PCI: rcar: Write zeroes to reserved PCIEPARL bits 

The lower 7 bits of PCIEPARL are reserved.  When we write to this register,
these bits must be 0.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Nobuhiro Iwamatsu 2015-02-02 14:09:58 +09:00 committed by Bjorn Helgaas
parent 1fc6aa96ea
commit 2ea2a2734c
1 changed files with 2 additions and 1 deletions
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3
drivers/pci/host/pcie-rcar.c
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@ -342,7 +342,8 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
res_start = res->start;
rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
rcar_pci_write_reg(pcie, lower_32_bits(res_start), PCIEPARL(win));
rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F,
PCIEPARL(win));
/* First resource is for IO */
mask = PAR_ENABLE;