mirror of https://gitee.com/openkylin/linux.git
drm/nouveau/gpio: convert to new-style nvkm_subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
c5fcafa528
commit
2ea7249fe2
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@ -270,10 +270,10 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
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}
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if (gpio) {
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saved_gpio1 = gpio->get(gpio, 0, DCB_GPIO_TVDAC1, 0xff);
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saved_gpio0 = gpio->get(gpio, 0, DCB_GPIO_TVDAC0, 0xff);
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gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, dcb->type == DCB_OUTPUT_TV);
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gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, dcb->type == DCB_OUTPUT_TV);
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saved_gpio1 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC1, 0xff);
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saved_gpio0 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC0, 0xff);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, dcb->type == DCB_OUTPUT_TV);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, dcb->type == DCB_OUTPUT_TV);
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}
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msleep(4);
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@ -325,8 +325,8 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
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nvif_wr32(device, NV_PBUS_POWERCTRL_2, saved_powerctrl_2);
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if (gpio) {
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gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, saved_gpio1);
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gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, saved_gpio0);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, saved_gpio1);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, saved_gpio0);
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}
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return sample;
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@ -62,8 +62,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
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head = (dacclk & 0x100) >> 8;
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/* Save the previous state. */
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gpio1 = gpio->get(gpio, 0, DCB_GPIO_TVDAC1, 0xff);
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gpio0 = gpio->get(gpio, 0, DCB_GPIO_TVDAC0, 0xff);
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gpio1 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC1, 0xff);
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gpio0 = nvkm_gpio_get(gpio, 0, DCB_GPIO_TVDAC0, 0xff);
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fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL);
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fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START);
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fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END);
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@ -74,8 +74,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
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ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c);
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/* Prepare the DAC for load detection. */
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gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, true);
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gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, true);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, true);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, true);
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NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343);
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NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047);
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@ -120,8 +120,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
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NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end);
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NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start);
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NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal);
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gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, gpio1);
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gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, gpio0);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, gpio1);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, gpio0);
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return sample;
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}
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@ -395,8 +395,8 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode)
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nv_load_ptv(dev, regs, 200);
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gpio->set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, mode == DRM_MODE_DPMS_ON);
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gpio->set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, mode == DRM_MODE_DPMS_ON);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, mode == DRM_MODE_DPMS_ON);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, mode == DRM_MODE_DPMS_ON);
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nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON);
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}
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@ -54,7 +54,7 @@ u64 nvif_device_time(struct nvif_device *);
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#define nvxx_fb(a) nvxx_device(a)->fb
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#define nvxx_mmu(a) nvkm_mmu(nvxx_device(a))
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#define nvxx_bar(a) nvxx_device(a)->bar
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#define nvxx_gpio(a) nvkm_gpio(nvxx_device(a))
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#define nvxx_gpio(a) nvxx_device(a)->gpio
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#define nvxx_clk(a) nvxx_device(a)->clk
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#define nvxx_i2c(a) nvkm_i2c(nvxx_device(a))
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#define nvxx_therm(a) nvkm_therm(nvxx_device(a))
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@ -19,26 +19,21 @@ struct nvkm_gpio_ntfy_rep {
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};
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struct nvkm_gpio {
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const struct nvkm_gpio_func *func;
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struct nvkm_subdev subdev;
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struct nvkm_event event;
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void (*reset)(struct nvkm_gpio *, u8 func);
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int (*find)(struct nvkm_gpio *, int idx, u8 tag, u8 line,
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struct dcb_gpio_func *);
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int (*set)(struct nvkm_gpio *, int idx, u8 tag, u8 line, int state);
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int (*get)(struct nvkm_gpio *, int idx, u8 tag, u8 line);
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};
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static inline struct nvkm_gpio *
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nvkm_gpio(void *obj)
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{
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return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_GPIO);
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}
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void nvkm_gpio_reset(struct nvkm_gpio *, u8 func);
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int nvkm_gpio_find(struct nvkm_gpio *, int idx, u8 tag, u8 line,
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struct dcb_gpio_func *);
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int nvkm_gpio_set(struct nvkm_gpio *, int idx, u8 tag, u8 line, int state);
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int nvkm_gpio_get(struct nvkm_gpio *, int idx, u8 tag, u8 line);
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extern struct nvkm_oclass *nv10_gpio_oclass;
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extern struct nvkm_oclass *nv50_gpio_oclass;
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extern struct nvkm_oclass *g94_gpio_oclass;
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extern struct nvkm_oclass *gf110_gpio_oclass;
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extern struct nvkm_oclass *gk104_gpio_oclass;
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int nv10_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **);
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int nv50_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **);
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int g94_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **);
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int gf119_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **);
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int gk104_gpio_new(struct nvkm_device *, int, struct nvkm_gpio **);
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#endif
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@ -125,9 +125,9 @@ nouveau_connector_ddc_detect(struct drm_connector *connector)
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* is handled by the SOR itself, and not required for LVDS DDC.
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*/
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if (nv_connector->type == DCB_CONNECTOR_eDP) {
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panel = gpio->get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff);
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panel = nvkm_gpio_get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff);
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if (panel == 0) {
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gpio->set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1);
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msleep(300);
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}
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}
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* state to avoid confusing the SOR for other output types.
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*/
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if (!nv_encoder && panel == 0)
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gpio->set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, panel);
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nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, panel);
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return nv_encoder;
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}
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@ -121,7 +121,7 @@ nv10_chipset = {
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.clk = nv04_clk_new,
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.devinit = nv10_devinit_new,
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.fb = nv10_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv10_devinit_new,
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.fb = nv10_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv10_devinit_new,
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.fb = nv10_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv10_devinit_new,
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.fb = nv10_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv10_devinit_new,
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.fb = nv10_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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@ -224,7 +224,7 @@ nv1a_chipset = {
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.clk = nv04_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv1a_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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@ -245,7 +245,7 @@ nv1f_chipset = {
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.clk = nv04_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv1a_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv20_devinit_new,
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.fb = nv20_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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@ -287,7 +287,7 @@ nv25_chipset = {
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.clk = nv04_clk_new,
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.devinit = nv20_devinit_new,
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.fb = nv25_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv20_devinit_new,
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.fb = nv25_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv20_devinit_new,
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.fb = nv25_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv20_devinit_new,
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.fb = nv30_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv20_devinit_new,
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.fb = nv30_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv10_devinit_new,
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.fb = nv10_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv20_devinit_new,
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.fb = nv35_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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.clk = nv04_clk_new,
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.devinit = nv20_devinit_new,
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.fb = nv36_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv04_instmem_new,
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// .mc = nv04_mc_new,
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@ -458,7 +458,7 @@ nv40_chipset = {
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.clk = nv40_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv40_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv40_instmem_new,
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// .mc = nv40_mc_new,
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.clk = nv40_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv41_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv40_instmem_new,
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// .mc = nv40_mc_new,
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.clk = nv40_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv41_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv40_instmem_new,
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// .mc = nv40_mc_new,
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@ -533,7 +533,7 @@ nv43_chipset = {
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.clk = nv40_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv41_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv40_instmem_new,
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// .mc = nv40_mc_new,
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@ -558,7 +558,7 @@ nv44_chipset = {
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.clk = nv40_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv44_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv40_instmem_new,
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// .mc = nv44_mc_new,
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@ -583,7 +583,7 @@ nv45_chipset = {
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.clk = nv40_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv40_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv40_instmem_new,
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// .mc = nv40_mc_new,
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@ -608,7 +608,7 @@ nv46_chipset = {
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.clk = nv40_clk_new,
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.devinit = nv1a_devinit_new,
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.fb = nv46_fb_new,
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// .gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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// .i2c = nv04_i2c_new,
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// .imem = nv40_instmem_new,
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// .mc = nv44_mc_new,
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@ -633,7 +633,7 @@ nv47_chipset = {
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.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv47_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv04_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv40_mc_new,
|
||||
|
@ -658,7 +658,7 @@ nv49_chipset = {
|
|||
.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv49_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv04_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv40_mc_new,
|
||||
|
@ -683,7 +683,7 @@ nv4a_chipset = {
|
|||
.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv44_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv04_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv44_mc_new,
|
||||
|
@ -708,7 +708,7 @@ nv4b_chipset = {
|
|||
.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv49_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv04_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv40_mc_new,
|
||||
|
@ -733,7 +733,7 @@ nv4c_chipset = {
|
|||
.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv46_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv04_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv4c_mc_new,
|
||||
|
@ -758,7 +758,7 @@ nv4e_chipset = {
|
|||
.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv4e_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv4e_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv4c_mc_new,
|
||||
|
@ -785,7 +785,7 @@ nv50_chipset = {
|
|||
.devinit = nv50_devinit_new,
|
||||
.fb = nv50_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = nv50_gpio_new,
|
||||
.gpio = nv50_gpio_new,
|
||||
// .i2c = nv50_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = nv50_mc_new,
|
||||
|
@ -811,7 +811,7 @@ nv63_chipset = {
|
|||
.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv46_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv04_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv4c_mc_new,
|
||||
|
@ -836,7 +836,7 @@ nv67_chipset = {
|
|||
.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv46_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv04_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv4c_mc_new,
|
||||
|
@ -861,7 +861,7 @@ nv68_chipset = {
|
|||
.clk = nv40_clk_new,
|
||||
.devinit = nv1a_devinit_new,
|
||||
.fb = nv46_fb_new,
|
||||
// .gpio = nv10_gpio_new,
|
||||
.gpio = nv10_gpio_new,
|
||||
// .i2c = nv04_i2c_new,
|
||||
// .imem = nv40_instmem_new,
|
||||
// .mc = nv4c_mc_new,
|
||||
|
@ -888,7 +888,7 @@ nv84_chipset = {
|
|||
.devinit = g84_devinit_new,
|
||||
.fb = g84_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = nv50_gpio_new,
|
||||
.gpio = nv50_gpio_new,
|
||||
// .i2c = nv50_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = nv50_mc_new,
|
||||
|
@ -919,7 +919,7 @@ nv86_chipset = {
|
|||
.devinit = g84_devinit_new,
|
||||
.fb = g84_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = nv50_gpio_new,
|
||||
.gpio = nv50_gpio_new,
|
||||
// .i2c = nv50_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = nv50_mc_new,
|
||||
|
@ -950,7 +950,7 @@ nv92_chipset = {
|
|||
.devinit = g84_devinit_new,
|
||||
.fb = g84_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = nv50_gpio_new,
|
||||
.gpio = nv50_gpio_new,
|
||||
// .i2c = nv50_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = nv50_mc_new,
|
||||
|
@ -981,7 +981,7 @@ nv94_chipset = {
|
|||
.devinit = g84_devinit_new,
|
||||
.fb = g84_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = g94_mc_new,
|
||||
|
@ -1006,7 +1006,7 @@ static const struct nvkm_device_chip
|
|||
nv96_chipset = {
|
||||
.name = "G96",
|
||||
.bios = nvkm_bios_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
.clk = g84_clk_new,
|
||||
|
@ -1037,7 +1037,7 @@ static const struct nvkm_device_chip
|
|||
nv98_chipset = {
|
||||
.name = "G98",
|
||||
.bios = nvkm_bios_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
.clk = g84_clk_new,
|
||||
|
@ -1074,7 +1074,7 @@ nva0_chipset = {
|
|||
.devinit = g84_devinit_new,
|
||||
.fb = g84_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = nv50_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = g98_mc_new,
|
||||
|
@ -1105,7 +1105,7 @@ nva3_chipset = {
|
|||
.devinit = gt215_devinit_new,
|
||||
.fb = gt215_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = g98_mc_new,
|
||||
|
@ -1138,7 +1138,7 @@ nva5_chipset = {
|
|||
.devinit = gt215_devinit_new,
|
||||
.fb = gt215_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = g98_mc_new,
|
||||
|
@ -1170,7 +1170,7 @@ nva8_chipset = {
|
|||
.devinit = gt215_devinit_new,
|
||||
.fb = gt215_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = g98_mc_new,
|
||||
|
@ -1202,7 +1202,7 @@ nvaa_chipset = {
|
|||
.devinit = g98_devinit_new,
|
||||
.fb = mcp77_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = g98_mc_new,
|
||||
|
@ -1233,7 +1233,7 @@ nvac_chipset = {
|
|||
.devinit = g98_devinit_new,
|
||||
.fb = mcp77_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = g98_mc_new,
|
||||
|
@ -1264,7 +1264,7 @@ nvaf_chipset = {
|
|||
.devinit = mcp89_devinit_new,
|
||||
.fb = mcp89_fb_new,
|
||||
.fuse = nv50_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
// .mc = g98_mc_new,
|
||||
|
@ -1296,7 +1296,7 @@ nvc0_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1331,7 +1331,7 @@ nvc1_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1365,7 +1365,7 @@ nvc3_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1399,7 +1399,7 @@ nvc4_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1434,7 +1434,7 @@ nvc8_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1469,7 +1469,7 @@ nvce_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1504,7 +1504,7 @@ nvcf_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = g94_gpio_new,
|
||||
.gpio = g94_gpio_new,
|
||||
// .i2c = g94_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1538,7 +1538,7 @@ nvd7_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gf110_gpio_new,
|
||||
.gpio = gf119_gpio_new,
|
||||
// .i2c = gf117_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1570,7 +1570,7 @@ nvd9_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gf100_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gf110_gpio_new,
|
||||
.gpio = gf119_gpio_new,
|
||||
// .i2c = gf110_i2c_new,
|
||||
// .ibus = gf100_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1604,7 +1604,7 @@ nve4_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gk104_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gk104_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1640,7 +1640,7 @@ nve6_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gk104_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gk104_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1676,7 +1676,7 @@ nve7_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gk104_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gk104_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1736,7 +1736,7 @@ nvf0_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gk104_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gk104_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1772,7 +1772,7 @@ nvf1_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gk104_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gf110_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1808,7 +1808,7 @@ nv106_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gk104_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gk104_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1843,7 +1843,7 @@ nv108_chipset = {
|
|||
.devinit = gf100_devinit_new,
|
||||
.fb = gk104_fb_new,
|
||||
.fuse = gf100_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gk104_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1878,7 +1878,7 @@ nv117_chipset = {
|
|||
.devinit = gm107_devinit_new,
|
||||
.fb = gm107_fb_new,
|
||||
.fuse = gm107_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gf110_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1907,7 +1907,7 @@ nv124_chipset = {
|
|||
.devinit = gm204_devinit_new,
|
||||
.fb = gm107_fb_new,
|
||||
.fuse = gm107_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gm204_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
@ -1936,7 +1936,7 @@ nv126_chipset = {
|
|||
.devinit = gm204_devinit_new,
|
||||
.fb = gm107_fb_new,
|
||||
.fuse = gm107_fuse_new,
|
||||
// .gpio = gk104_gpio_new,
|
||||
.gpio = gk104_gpio_new,
|
||||
// .i2c = gm204_i2c_new,
|
||||
// .ibus = gk104_ibus_new,
|
||||
// .imem = nv50_instmem_new,
|
||||
|
|
|
@ -28,7 +28,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
{
|
||||
switch (device->chipset) {
|
||||
case 0xc0:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -53,7 +52,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||
break;
|
||||
case 0xc4:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -78,7 +76,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||
break;
|
||||
case 0xc3:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -102,7 +99,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||
break;
|
||||
case 0xce:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -127,7 +123,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||
break;
|
||||
case 0xcf:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -151,7 +146,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||
break;
|
||||
case 0xc1:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -175,7 +169,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gf108_pm_oclass;
|
||||
break;
|
||||
case 0xc8:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -200,7 +193,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||
break;
|
||||
case 0xd9:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -224,7 +216,6 @@ gf100_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass;
|
||||
break;
|
||||
case 0xd7:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gf117_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
|
|
@ -28,7 +28,6 @@ gk104_identify(struct nvkm_device *device)
|
|||
{
|
||||
switch (device->chipset) {
|
||||
case 0xe4:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -54,7 +53,6 @@ gk104_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
|
||||
break;
|
||||
case 0xe7:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -80,7 +78,6 @@ gk104_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
|
||||
break;
|
||||
case 0xe6:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -122,7 +119,6 @@ gk104_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_SUBDEV_PMU ] = gk20a_pmu_oclass;
|
||||
break;
|
||||
case 0xf0:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -148,7 +144,6 @@ gk104_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
|
||||
break;
|
||||
case 0xf1:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -174,7 +169,6 @@ gk104_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
|
||||
break;
|
||||
case 0x106:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -199,7 +193,6 @@ gk104_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
|
||||
break;
|
||||
case 0x108:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
|
|
@ -28,7 +28,6 @@ gm100_identify(struct nvkm_device *device)
|
|||
{
|
||||
switch (device->chipset) {
|
||||
case 0x117:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -60,7 +59,6 @@ gm100_identify(struct nvkm_device *device)
|
|||
#endif
|
||||
break;
|
||||
case 0x124:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
|
||||
#if 0
|
||||
/* looks to be some non-trivial changes */
|
||||
|
@ -93,7 +91,6 @@ gm100_identify(struct nvkm_device *device)
|
|||
#endif
|
||||
break;
|
||||
case 0x126:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
|
||||
#if 0
|
||||
/* looks to be some non-trivial changes */
|
||||
|
|
|
@ -28,7 +28,6 @@ nv10_identify(struct nvkm_device *device)
|
|||
{
|
||||
switch (device->chipset) {
|
||||
case 0x10:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -39,7 +38,6 @@ nv10_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x15:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -52,7 +50,6 @@ nv10_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x16:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -65,7 +62,6 @@ nv10_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x1a:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -78,7 +74,6 @@ nv10_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x11:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -91,7 +86,6 @@ nv10_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x17:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -104,7 +98,6 @@ nv10_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x1f:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -117,7 +110,6 @@ nv10_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x18:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
|
|
@ -28,7 +28,6 @@ nv20_identify(struct nvkm_device *device)
|
|||
{
|
||||
switch (device->chipset) {
|
||||
case 0x20:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -41,7 +40,6 @@ nv20_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x25:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -54,7 +52,6 @@ nv20_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x28:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -67,7 +64,6 @@ nv20_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x2a:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
|
|
@ -28,7 +28,6 @@ nv30_identify(struct nvkm_device *device)
|
|||
{
|
||||
switch (device->chipset) {
|
||||
case 0x30:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -41,7 +40,6 @@ nv30_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x35:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -54,7 +52,6 @@ nv30_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x31:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -68,7 +65,6 @@ nv30_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x36:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
@ -82,7 +78,6 @@ nv30_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
|
||||
break;
|
||||
case 0x34:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||
|
|
|
@ -28,7 +28,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
{
|
||||
switch (device->chipset) {
|
||||
case 0x40:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
|
||||
|
@ -45,7 +44,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x41:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
|
||||
|
@ -62,7 +60,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x42:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
|
||||
|
@ -79,7 +76,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x43:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
|
||||
|
@ -96,7 +92,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x45:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
|
||||
|
@ -113,7 +108,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x47:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
|
||||
|
@ -130,7 +124,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x49:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
|
||||
|
@ -147,7 +140,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x4b:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
|
||||
|
@ -164,7 +156,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x44:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
|
||||
|
@ -181,7 +172,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x46:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
|
||||
|
@ -198,7 +188,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x4a:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
|
||||
|
@ -215,7 +204,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x4c:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
|
||||
|
@ -232,7 +220,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x4e:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv4e_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
|
||||
|
@ -249,7 +236,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x63:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
|
||||
|
@ -266,7 +252,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x67:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
|
||||
|
@ -283,7 +268,6 @@ nv40_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||
break;
|
||||
case 0x68:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
|
||||
|
|
|
@ -28,7 +28,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
{
|
||||
switch (device->chipset) {
|
||||
case 0x50:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -46,7 +45,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = nv50_pm_oclass;
|
||||
break;
|
||||
case 0x84:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -67,7 +65,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||
break;
|
||||
case 0x86:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -88,7 +85,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||
break;
|
||||
case 0x92:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -109,7 +105,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||
break;
|
||||
case 0x94:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -130,7 +125,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||
break;
|
||||
case 0x96:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -151,7 +145,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||
break;
|
||||
case 0x98:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -172,7 +165,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||
break;
|
||||
case 0xa0:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -193,7 +185,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gt200_pm_oclass;
|
||||
break;
|
||||
case 0xaa:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -214,7 +205,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||
break;
|
||||
case 0xac:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -235,7 +225,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||
break;
|
||||
case 0xa3:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -258,7 +247,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
||||
break;
|
||||
case 0xa5:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -280,7 +268,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
||||
break;
|
||||
case 0xa8:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
@ -302,7 +289,6 @@ nv50_identify(struct nvkm_device *device)
|
|||
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
||||
break;
|
||||
case 0xaf:
|
||||
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
||||
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
|
||||
|
|
|
@ -41,7 +41,7 @@ nvkm_connector_hpd(struct nvkm_notify *notify)
|
|||
|
||||
CONN_DBG(conn, "HPD: %d", line->mask);
|
||||
|
||||
if (!gpio->get(gpio, 0, DCB_GPIO_UNUSED, conn->hpd.index))
|
||||
if (!nvkm_gpio_get(gpio, 0, DCB_GPIO_UNUSED, conn->hpd.index))
|
||||
rep.mask = NVIF_NOTIFY_CONN_V0_UNPLUG;
|
||||
else
|
||||
rep.mask = NVIF_NOTIFY_CONN_V0_PLUG;
|
||||
|
@ -98,7 +98,7 @@ nvkm_connector_ctor(struct nvkm_disp *disp, int index,
|
|||
}
|
||||
info->hpd = hpd[info->hpd];
|
||||
|
||||
ret = gpio->find(gpio, 0, info->hpd, DCB_GPIO_UNUSED, &func);
|
||||
ret = nvkm_gpio_find(gpio, 0, info->hpd, DCB_GPIO_UNUSED, &func);
|
||||
if (ret) {
|
||||
CONN_ERR(conn, "func %02x lookup failed, %d",
|
||||
info->hpd, ret);
|
||||
|
|
|
@ -1933,8 +1933,8 @@ init_gpio(struct nvbios_init *init)
|
|||
trace("GPIO\n");
|
||||
init->offset += 1;
|
||||
|
||||
if (init_exec(init) && gpio && gpio->reset)
|
||||
gpio->reset(gpio, DCB_GPIO_UNUSED);
|
||||
if (init_exec(init))
|
||||
nvkm_gpio_reset(gpio, DCB_GPIO_UNUSED);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2179,8 +2179,8 @@ init_gpio_ne(struct nvbios_init *init)
|
|||
trace("\tFUNC[0x%02x]", func.func);
|
||||
if (i == (init->offset + count)) {
|
||||
cont(" *");
|
||||
if (init_exec(init) && gpio && gpio->reset)
|
||||
gpio->reset(gpio, func.func);
|
||||
if (init_exec(init))
|
||||
nvkm_gpio_reset(gpio, func.func);
|
||||
}
|
||||
cont("\n");
|
||||
}
|
||||
|
|
|
@ -1522,14 +1522,14 @@ gk104_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
|
|||
}
|
||||
|
||||
/* lookup memory voltage gpios */
|
||||
ret = gpio->find(gpio, 0, 0x18, DCB_GPIO_UNUSED, &func);
|
||||
ret = nvkm_gpio_find(gpio, 0, 0x18, DCB_GPIO_UNUSED, &func);
|
||||
if (ret == 0) {
|
||||
ram->fuc.r_gpioMV = ramfuc_reg(0x00d610 + (func.line * 0x04));
|
||||
ram->fuc.r_funcMV[0] = (func.log[0] ^ 2) << 12;
|
||||
ram->fuc.r_funcMV[1] = (func.log[1] ^ 2) << 12;
|
||||
}
|
||||
|
||||
ret = gpio->find(gpio, 0, 0x2e, DCB_GPIO_UNUSED, &func);
|
||||
ret = nvkm_gpio_find(gpio, 0, 0x2e, DCB_GPIO_UNUSED, &func);
|
||||
if (ret == 0) {
|
||||
ram->fuc.r_gpio2E = ramfuc_reg(0x00d610 + (func.line * 0x04));
|
||||
ram->fuc.r_func2E[0] = (func.log[0] ^ 2) << 12;
|
||||
|
|
|
@ -468,13 +468,13 @@ gt215_ram_lock_pll(struct gt215_ramfuc *fuc, struct gt215_clk_info *mclk)
|
|||
static void
|
||||
gt215_ram_fbvref(struct gt215_ramfuc *fuc, u32 val)
|
||||
{
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(fuc->base.fb);
|
||||
struct nvkm_gpio *gpio = fuc->base.fb->subdev.device->gpio;
|
||||
struct dcb_gpio_func func;
|
||||
u32 reg, sh, gpio_val;
|
||||
int ret;
|
||||
|
||||
if (gpio->get(gpio, 0, 0x2e, DCB_GPIO_UNUSED) != val) {
|
||||
ret = gpio->find(gpio, 0, 0x2e, DCB_GPIO_UNUSED, &func);
|
||||
if (nvkm_gpio_get(gpio, 0, 0x2e, DCB_GPIO_UNUSED) != val) {
|
||||
ret = nvkm_gpio_find(gpio, 0, 0x2e, DCB_GPIO_UNUSED, &func);
|
||||
if (ret)
|
||||
return;
|
||||
|
||||
|
@ -982,7 +982,7 @@ gt215_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
|
|||
ram->fuc.r_mr[3] = ramfuc_reg(0x1002e4);
|
||||
}
|
||||
|
||||
ret = gpio->find(gpio, 0, 0x2e, DCB_GPIO_UNUSED, &func);
|
||||
ret = nvkm_gpio_find(gpio, 0, 0x2e, DCB_GPIO_UNUSED, &func);
|
||||
if (ret == 0) {
|
||||
nv50_gpio_location(func.line, ®, &shift);
|
||||
ram->fuc.r_gpioFBVREF = ramfuc_reg(reg);
|
||||
|
|
|
@ -2,5 +2,5 @@ nvkm-y += nvkm/subdev/gpio/base.o
|
|||
nvkm-y += nvkm/subdev/gpio/nv10.o
|
||||
nvkm-y += nvkm/subdev/gpio/nv50.o
|
||||
nvkm-y += nvkm/subdev/gpio/g94.o
|
||||
nvkm-y += nvkm/subdev/gpio/gf110.o
|
||||
nvkm-y += nvkm/subdev/gpio/gf119.o
|
||||
nvkm-y += nvkm/subdev/gpio/gk104.o
|
||||
|
|
|
@ -28,18 +28,23 @@
|
|||
static int
|
||||
nvkm_gpio_drive(struct nvkm_gpio *gpio, int idx, int line, int dir, int out)
|
||||
{
|
||||
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
|
||||
return impl->drive ? impl->drive(gpio, line, dir, out) : -ENODEV;
|
||||
return gpio->func->drive(gpio, line, dir, out);
|
||||
}
|
||||
|
||||
static int
|
||||
nvkm_gpio_sense(struct nvkm_gpio *gpio, int idx, int line)
|
||||
{
|
||||
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
|
||||
return impl->sense ? impl->sense(gpio, line) : -ENODEV;
|
||||
return gpio->func->sense(gpio, line);
|
||||
}
|
||||
|
||||
static int
|
||||
void
|
||||
nvkm_gpio_reset(struct nvkm_gpio *gpio, u8 func)
|
||||
{
|
||||
if (gpio->func->reset)
|
||||
gpio->func->reset(gpio, func);
|
||||
}
|
||||
|
||||
int
|
||||
nvkm_gpio_find(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line,
|
||||
struct dcb_gpio_func *func)
|
||||
{
|
||||
|
@ -71,7 +76,7 @@ nvkm_gpio_find(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line,
|
|||
return -ENOENT;
|
||||
}
|
||||
|
||||
static int
|
||||
int
|
||||
nvkm_gpio_set(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line, int state)
|
||||
{
|
||||
struct dcb_gpio_func func;
|
||||
|
@ -87,7 +92,7 @@ nvkm_gpio_set(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line, int state)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int
|
||||
int
|
||||
nvkm_gpio_get(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line)
|
||||
{
|
||||
struct dcb_gpio_func func;
|
||||
|
@ -107,16 +112,14 @@ static void
|
|||
nvkm_gpio_intr_fini(struct nvkm_event *event, int type, int index)
|
||||
{
|
||||
struct nvkm_gpio *gpio = container_of(event, typeof(*gpio), event);
|
||||
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
|
||||
impl->intr_mask(gpio, type, 1 << index, 0);
|
||||
gpio->func->intr_mask(gpio, type, 1 << index, 0);
|
||||
}
|
||||
|
||||
static void
|
||||
nvkm_gpio_intr_init(struct nvkm_event *event, int type, int index)
|
||||
{
|
||||
struct nvkm_gpio *gpio = container_of(event, typeof(*gpio), event);
|
||||
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
|
||||
impl->intr_mask(gpio, type, 1 << index, 1 << index);
|
||||
gpio->func->intr_mask(gpio, type, 1 << index, 1 << index);
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -133,16 +136,22 @@ nvkm_gpio_intr_ctor(struct nvkm_object *object, void *data, u32 size,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
static const struct nvkm_event_func
|
||||
nvkm_gpio_intr_func = {
|
||||
.ctor = nvkm_gpio_intr_ctor,
|
||||
.init = nvkm_gpio_intr_init,
|
||||
.fini = nvkm_gpio_intr_fini,
|
||||
};
|
||||
|
||||
static void
|
||||
nvkm_gpio_intr(struct nvkm_subdev *subdev)
|
||||
{
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(subdev);
|
||||
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
|
||||
u32 hi, lo, i;
|
||||
|
||||
impl->intr_stat(gpio, &hi, &lo);
|
||||
gpio->func->intr_stat(gpio, &hi, &lo);
|
||||
|
||||
for (i = 0; (hi | lo) && i < impl->lines; i++) {
|
||||
for (i = 0; (hi | lo) && i < gpio->func->lines; i++) {
|
||||
struct nvkm_gpio_ntfy_rep rep = {
|
||||
.mask = (NVKM_GPIO_HI * !!(hi & (1 << i))) |
|
||||
(NVKM_GPIO_LO * !!(lo & (1 << i))),
|
||||
|
@ -151,24 +160,15 @@ nvkm_gpio_intr(struct nvkm_subdev *subdev)
|
|||
}
|
||||
}
|
||||
|
||||
static const struct nvkm_event_func
|
||||
nvkm_gpio_intr_func = {
|
||||
.ctor = nvkm_gpio_intr_ctor,
|
||||
.init = nvkm_gpio_intr_init,
|
||||
.fini = nvkm_gpio_intr_fini,
|
||||
};
|
||||
|
||||
int
|
||||
_nvkm_gpio_fini(struct nvkm_object *object, bool suspend)
|
||||
static int
|
||||
nvkm_gpio_fini(struct nvkm_subdev *subdev, bool suspend)
|
||||
{
|
||||
const struct nvkm_gpio_impl *impl = (void *)object->oclass;
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(object);
|
||||
u32 mask = (1 << impl->lines) - 1;
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(subdev);
|
||||
u32 mask = (1 << gpio->func->lines) - 1;
|
||||
|
||||
impl->intr_mask(gpio, NVKM_GPIO_TOGGLED, mask, 0);
|
||||
impl->intr_stat(gpio, &mask, &mask);
|
||||
|
||||
return nvkm_subdev_fini_old(&gpio->subdev, suspend);
|
||||
gpio->func->intr_mask(gpio, NVKM_GPIO_TOGGLED, mask, 0);
|
||||
gpio->func->intr_stat(gpio, &mask, &mask);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct dmi_system_id gpio_reset_ids[] = {
|
||||
|
@ -182,70 +182,43 @@ static struct dmi_system_id gpio_reset_ids[] = {
|
|||
{ }
|
||||
};
|
||||
|
||||
int
|
||||
_nvkm_gpio_init(struct nvkm_object *object)
|
||||
static int
|
||||
nvkm_gpio_init(struct nvkm_subdev *subdev)
|
||||
{
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(object);
|
||||
int ret;
|
||||
|
||||
ret = nvkm_subdev_init_old(&gpio->subdev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (gpio->reset && dmi_check_system(gpio_reset_ids))
|
||||
gpio->reset(gpio, DCB_GPIO_UNUSED);
|
||||
|
||||
return ret;
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(subdev);
|
||||
if (dmi_check_system(gpio_reset_ids))
|
||||
nvkm_gpio_reset(gpio, DCB_GPIO_UNUSED);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
_nvkm_gpio_dtor(struct nvkm_object *object)
|
||||
static void *
|
||||
nvkm_gpio_dtor(struct nvkm_subdev *subdev)
|
||||
{
|
||||
struct nvkm_gpio *gpio = (void *)object;
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(subdev);
|
||||
nvkm_event_fini(&gpio->event);
|
||||
nvkm_subdev_destroy(&gpio->subdev);
|
||||
return gpio;
|
||||
}
|
||||
|
||||
static const struct nvkm_subdev_func
|
||||
nvkm_gpio = {
|
||||
.dtor = nvkm_gpio_dtor,
|
||||
.init = nvkm_gpio_init,
|
||||
.fini = nvkm_gpio_fini,
|
||||
.intr = nvkm_gpio_intr,
|
||||
};
|
||||
|
||||
int
|
||||
nvkm_gpio_create_(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||
struct nvkm_oclass *oclass, int length, void **pobject)
|
||||
{
|
||||
const struct nvkm_gpio_impl *impl = (void *)oclass;
|
||||
struct nvkm_gpio *gpio;
|
||||
int ret;
|
||||
|
||||
ret = nvkm_subdev_create_(parent, engine, oclass, 0, "GPIO",
|
||||
"gpio", length, pobject);
|
||||
gpio = *pobject;
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
gpio->find = nvkm_gpio_find;
|
||||
gpio->set = nvkm_gpio_set;
|
||||
gpio->get = nvkm_gpio_get;
|
||||
gpio->reset = impl->reset;
|
||||
|
||||
ret = nvkm_event_init(&nvkm_gpio_intr_func, 2, impl->lines,
|
||||
&gpio->event);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
nv_subdev(gpio)->intr = nvkm_gpio_intr;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
_nvkm_gpio_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||
struct nvkm_object **pobject)
|
||||
nvkm_gpio_new_(const struct nvkm_gpio_func *func, struct nvkm_device *device,
|
||||
int index, struct nvkm_gpio **pgpio)
|
||||
{
|
||||
struct nvkm_gpio *gpio;
|
||||
int ret;
|
||||
|
||||
ret = nvkm_gpio_create(parent, engine, oclass, &gpio);
|
||||
*pobject = nv_object(gpio);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (!(gpio = *pgpio = kzalloc(sizeof(*gpio), GFP_KERNEL)))
|
||||
return -ENOMEM;
|
||||
|
||||
return 0;
|
||||
nvkm_subdev_ctor(&nvkm_gpio, device, index, 0, &gpio->subdev);
|
||||
gpio->func = func;
|
||||
|
||||
return nvkm_event_init(&nvkm_gpio_intr_func, 2, func->lines,
|
||||
&gpio->event);
|
||||
}
|
||||
|
|
|
@ -57,19 +57,18 @@ g94_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
|
|||
nvkm_wr32(device, 0x00e070, inte1);
|
||||
}
|
||||
|
||||
struct nvkm_oclass *
|
||||
g94_gpio_oclass = &(struct nvkm_gpio_impl) {
|
||||
.base.handle = NV_SUBDEV(GPIO, 0x94),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_gpio_ctor,
|
||||
.dtor = _nvkm_gpio_dtor,
|
||||
.init = _nvkm_gpio_init,
|
||||
.fini = _nvkm_gpio_fini,
|
||||
},
|
||||
static const struct nvkm_gpio_func
|
||||
g94_gpio = {
|
||||
.lines = 32,
|
||||
.intr_stat = g94_gpio_intr_stat,
|
||||
.intr_mask = g94_gpio_intr_mask,
|
||||
.drive = nv50_gpio_drive,
|
||||
.sense = nv50_gpio_sense,
|
||||
.reset = nv50_gpio_reset,
|
||||
}.base;
|
||||
};
|
||||
|
||||
int
|
||||
g94_gpio_new(struct nvkm_device *device, int index, struct nvkm_gpio **pgpio)
|
||||
{
|
||||
return nvkm_gpio_new_(&g94_gpio, device, index, pgpio);
|
||||
}
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#include "priv.h"
|
||||
|
||||
void
|
||||
gf110_gpio_reset(struct nvkm_gpio *gpio, u8 match)
|
||||
gf119_gpio_reset(struct nvkm_gpio *gpio, u8 match)
|
||||
{
|
||||
struct nvkm_device *device = gpio->subdev.device;
|
||||
struct nvkm_bios *bios = device->bios;
|
||||
|
@ -44,7 +44,7 @@ gf110_gpio_reset(struct nvkm_gpio *gpio, u8 match)
|
|||
(match != DCB_GPIO_UNUSED && match != func))
|
||||
continue;
|
||||
|
||||
gpio->set(gpio, 0, func, line, defs);
|
||||
nvkm_gpio_set(gpio, 0, func, line, defs);
|
||||
|
||||
nvkm_mask(device, 0x00d610 + (line * 4), 0xff, unk0);
|
||||
if (unk1--)
|
||||
|
@ -53,7 +53,7 @@ gf110_gpio_reset(struct nvkm_gpio *gpio, u8 match)
|
|||
}
|
||||
|
||||
int
|
||||
gf110_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
|
||||
gf119_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
|
||||
{
|
||||
struct nvkm_device *device = gpio->subdev.device;
|
||||
u32 data = ((dir ^ 1) << 13) | (out << 12);
|
||||
|
@ -63,25 +63,24 @@ gf110_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
|
|||
}
|
||||
|
||||
int
|
||||
gf110_gpio_sense(struct nvkm_gpio *gpio, int line)
|
||||
gf119_gpio_sense(struct nvkm_gpio *gpio, int line)
|
||||
{
|
||||
struct nvkm_device *device = gpio->subdev.device;
|
||||
return !!(nvkm_rd32(device, 0x00d610 + (line * 4)) & 0x00004000);
|
||||
}
|
||||
|
||||
struct nvkm_oclass *
|
||||
gf110_gpio_oclass = &(struct nvkm_gpio_impl) {
|
||||
.base.handle = NV_SUBDEV(GPIO, 0xd0),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_gpio_ctor,
|
||||
.dtor = _nvkm_gpio_dtor,
|
||||
.init = _nvkm_gpio_init,
|
||||
.fini = _nvkm_gpio_fini,
|
||||
},
|
||||
static const struct nvkm_gpio_func
|
||||
gf119_gpio = {
|
||||
.lines = 32,
|
||||
.intr_stat = g94_gpio_intr_stat,
|
||||
.intr_mask = g94_gpio_intr_mask,
|
||||
.drive = gf110_gpio_drive,
|
||||
.sense = gf110_gpio_sense,
|
||||
.reset = gf110_gpio_reset,
|
||||
}.base;
|
||||
.drive = gf119_gpio_drive,
|
||||
.sense = gf119_gpio_sense,
|
||||
.reset = gf119_gpio_reset,
|
||||
};
|
||||
|
||||
int
|
||||
gf119_gpio_new(struct nvkm_device *device, int index, struct nvkm_gpio **pgpio)
|
||||
{
|
||||
return nvkm_gpio_new_(&gf119_gpio, device, index, pgpio);
|
||||
}
|
|
@ -57,19 +57,18 @@ gk104_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
|
|||
nvkm_wr32(device, 0x00dc88, inte1);
|
||||
}
|
||||
|
||||
struct nvkm_oclass *
|
||||
gk104_gpio_oclass = &(struct nvkm_gpio_impl) {
|
||||
.base.handle = NV_SUBDEV(GPIO, 0xe0),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_gpio_ctor,
|
||||
.dtor = _nvkm_gpio_dtor,
|
||||
.init = _nvkm_gpio_init,
|
||||
.fini = _nvkm_gpio_fini,
|
||||
},
|
||||
static const struct nvkm_gpio_func
|
||||
gk104_gpio = {
|
||||
.lines = 32,
|
||||
.intr_stat = gk104_gpio_intr_stat,
|
||||
.intr_mask = gk104_gpio_intr_mask,
|
||||
.drive = gf110_gpio_drive,
|
||||
.sense = gf110_gpio_sense,
|
||||
.reset = gf110_gpio_reset,
|
||||
}.base;
|
||||
.drive = gf119_gpio_drive,
|
||||
.sense = gf119_gpio_sense,
|
||||
.reset = gf119_gpio_reset,
|
||||
};
|
||||
|
||||
int
|
||||
gk104_gpio_new(struct nvkm_device *device, int index, struct nvkm_gpio **pgpio)
|
||||
{
|
||||
return nvkm_gpio_new_(&gk104_gpio, device, index, pgpio);
|
||||
}
|
||||
|
|
|
@ -102,18 +102,17 @@ nv10_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
|
|||
nvkm_wr32(device, 0x001144, inte);
|
||||
}
|
||||
|
||||
struct nvkm_oclass *
|
||||
nv10_gpio_oclass = &(struct nvkm_gpio_impl) {
|
||||
.base.handle = NV_SUBDEV(GPIO, 0x10),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_gpio_ctor,
|
||||
.dtor = _nvkm_gpio_dtor,
|
||||
.init = _nvkm_gpio_init,
|
||||
.fini = _nvkm_gpio_fini,
|
||||
},
|
||||
static const struct nvkm_gpio_func
|
||||
nv10_gpio = {
|
||||
.lines = 16,
|
||||
.intr_stat = nv10_gpio_intr_stat,
|
||||
.intr_mask = nv10_gpio_intr_mask,
|
||||
.drive = nv10_gpio_drive,
|
||||
.sense = nv10_gpio_sense,
|
||||
}.base;
|
||||
};
|
||||
|
||||
int
|
||||
nv10_gpio_new(struct nvkm_device *device, int index, struct nvkm_gpio **pgpio)
|
||||
{
|
||||
return nvkm_gpio_new_(&nv10_gpio, device, index, pgpio);
|
||||
}
|
||||
|
|
|
@ -48,7 +48,7 @@ nv50_gpio_reset(struct nvkm_gpio *gpio, u8 match)
|
|||
(match != DCB_GPIO_UNUSED && match != func))
|
||||
continue;
|
||||
|
||||
gpio->set(gpio, 0, func, line, defs);
|
||||
nvkm_gpio_set(gpio, 0, func, line, defs);
|
||||
|
||||
nvkm_mask(device, reg, 0x00010001 << lsh, val << lsh);
|
||||
}
|
||||
|
@ -115,19 +115,18 @@ nv50_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
|
|||
nvkm_wr32(device, 0x00e050, inte);
|
||||
}
|
||||
|
||||
struct nvkm_oclass *
|
||||
nv50_gpio_oclass = &(struct nvkm_gpio_impl) {
|
||||
.base.handle = NV_SUBDEV(GPIO, 0x50),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_gpio_ctor,
|
||||
.dtor = _nvkm_gpio_dtor,
|
||||
.init = _nvkm_gpio_init,
|
||||
.fini = _nvkm_gpio_fini,
|
||||
},
|
||||
static const struct nvkm_gpio_func
|
||||
nv50_gpio = {
|
||||
.lines = 16,
|
||||
.intr_stat = nv50_gpio_intr_stat,
|
||||
.intr_mask = nv50_gpio_intr_mask,
|
||||
.drive = nv50_gpio_drive,
|
||||
.sense = nv50_gpio_sense,
|
||||
.reset = nv50_gpio_reset,
|
||||
}.base;
|
||||
};
|
||||
|
||||
int
|
||||
nv50_gpio_new(struct nvkm_device *device, int index, struct nvkm_gpio **pgpio)
|
||||
{
|
||||
return nvkm_gpio_new_(&nv50_gpio, device, index, pgpio);
|
||||
}
|
||||
|
|
|
@ -1,33 +1,9 @@
|
|||
#ifndef __NVKM_GPIO_PRIV_H__
|
||||
#define __NVKM_GPIO_PRIV_H__
|
||||
#define nvkm_gpio(p) container_of((p), struct nvkm_gpio, subdev)
|
||||
#include <subdev/gpio.h>
|
||||
|
||||
#define nvkm_gpio_create(p,e,o,d) \
|
||||
nvkm_gpio_create_((p), (e), (o), sizeof(**d), (void **)d)
|
||||
#define nvkm_gpio_destroy(p) ({ \
|
||||
struct nvkm_gpio *gpio = (p); \
|
||||
_nvkm_gpio_dtor(nv_object(gpio)); \
|
||||
})
|
||||
#define nvkm_gpio_init(p) ({ \
|
||||
struct nvkm_gpio *gpio = (p); \
|
||||
_nvkm_gpio_init(nv_object(gpio)); \
|
||||
})
|
||||
#define nvkm_gpio_fini(p,s) ({ \
|
||||
struct nvkm_gpio *gpio = (p); \
|
||||
_nvkm_gpio_fini(nv_object(gpio), (s)); \
|
||||
})
|
||||
|
||||
int nvkm_gpio_create_(struct nvkm_object *, struct nvkm_object *,
|
||||
struct nvkm_oclass *, int, void **);
|
||||
int _nvkm_gpio_ctor(struct nvkm_object *, struct nvkm_object *,
|
||||
struct nvkm_oclass *, void *, u32,
|
||||
struct nvkm_object **);
|
||||
void _nvkm_gpio_dtor(struct nvkm_object *);
|
||||
int _nvkm_gpio_init(struct nvkm_object *);
|
||||
int _nvkm_gpio_fini(struct nvkm_object *, bool);
|
||||
|
||||
struct nvkm_gpio_impl {
|
||||
struct nvkm_oclass base;
|
||||
struct nvkm_gpio_func {
|
||||
int lines;
|
||||
|
||||
/* read and ack pending interrupts, returning only data
|
||||
|
@ -51,6 +27,9 @@ struct nvkm_gpio_impl {
|
|||
void (*reset)(struct nvkm_gpio *, u8);
|
||||
};
|
||||
|
||||
int nvkm_gpio_new_(const struct nvkm_gpio_func *, struct nvkm_device *,
|
||||
int index, struct nvkm_gpio **);
|
||||
|
||||
void nv50_gpio_reset(struct nvkm_gpio *, u8);
|
||||
int nv50_gpio_drive(struct nvkm_gpio *, int, int, int);
|
||||
int nv50_gpio_sense(struct nvkm_gpio *, int);
|
||||
|
@ -58,7 +37,7 @@ int nv50_gpio_sense(struct nvkm_gpio *, int);
|
|||
void g94_gpio_intr_stat(struct nvkm_gpio *, u32 *, u32 *);
|
||||
void g94_gpio_intr_mask(struct nvkm_gpio *, u32, u32, u32);
|
||||
|
||||
void gf110_gpio_reset(struct nvkm_gpio *, u8);
|
||||
int gf110_gpio_drive(struct nvkm_gpio *, int, int, int);
|
||||
int gf110_gpio_sense(struct nvkm_gpio *, int);
|
||||
void gf119_gpio_reset(struct nvkm_gpio *, u8);
|
||||
int gf119_gpio_drive(struct nvkm_gpio *, int, int, int);
|
||||
int gf119_gpio_sense(struct nvkm_gpio *, int);
|
||||
#endif
|
||||
|
|
|
@ -126,8 +126,9 @@ int
|
|||
nvkm_therm_fan_sense(struct nvkm_therm *obj)
|
||||
{
|
||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
||||
struct nvkm_timer *tmr = nvkm_timer(therm);
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(therm);
|
||||
struct nvkm_device *device = therm->base.subdev.device;
|
||||
struct nvkm_timer *tmr = device->timer;
|
||||
struct nvkm_gpio *gpio = device->gpio;
|
||||
u32 cycles, cur, prev;
|
||||
u64 start, end, tach;
|
||||
|
||||
|
@ -139,12 +140,14 @@ nvkm_therm_fan_sense(struct nvkm_therm *obj)
|
|||
* We get 4 changes (0 -> 1 -> 0 -> 1) per complete rotation.
|
||||
*/
|
||||
start = tmr->read(tmr);
|
||||
prev = gpio->get(gpio, 0, therm->fan->tach.func, therm->fan->tach.line);
|
||||
prev = nvkm_gpio_get(gpio, 0, therm->fan->tach.func,
|
||||
therm->fan->tach.line);
|
||||
cycles = 0;
|
||||
do {
|
||||
usleep_range(500, 1000); /* supports 0 < rpm < 7500 */
|
||||
|
||||
cur = gpio->get(gpio, 0, therm->fan->tach.func, therm->fan->tach.line);
|
||||
cur = nvkm_gpio_get(gpio, 0, therm->fan->tach.func,
|
||||
therm->fan->tach.line);
|
||||
if (prev != cur) {
|
||||
if (!start)
|
||||
start = tmr->read(tmr);
|
||||
|
@ -237,7 +240,7 @@ nvkm_therm_fan_ctor(struct nvkm_therm *obj)
|
|||
int ret;
|
||||
|
||||
/* attempt to locate a drivable fan, and determine control method */
|
||||
ret = gpio->find(gpio, 0, DCB_GPIO_FAN, 0xff, &func);
|
||||
ret = nvkm_gpio_find(gpio, 0, DCB_GPIO_FAN, 0xff, &func);
|
||||
if (ret == 0) {
|
||||
/* FIXME: is this really the place to perform such checks ? */
|
||||
if (func.line != 16 && func.log[0] & DCB_GPIO_LOG_DIR_IN) {
|
||||
|
@ -263,7 +266,8 @@ nvkm_therm_fan_ctor(struct nvkm_therm *obj)
|
|||
therm->fan->percent = nvkm_therm_fan_get(&therm->base);
|
||||
|
||||
/* attempt to detect a tachometer connection */
|
||||
ret = gpio->find(gpio, 0, DCB_GPIO_FAN_SENSE, 0xff, &therm->fan->tach);
|
||||
ret = nvkm_gpio_find(gpio, 0, DCB_GPIO_FAN_SENSE, 0xff,
|
||||
&therm->fan->tach);
|
||||
if (ret)
|
||||
therm->fan->tach.func = DCB_GPIO_UNUSED;
|
||||
|
||||
|
|
|
@ -39,8 +39,9 @@ nvkm_fanpwm_get(struct nvkm_therm *obj)
|
|||
{
|
||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
||||
struct nvkm_fanpwm *fan = (void *)therm->fan;
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(therm);
|
||||
int card_type = nv_device(therm)->card_type;
|
||||
struct nvkm_device *device = therm->base.subdev.device;
|
||||
struct nvkm_gpio *gpio = device->gpio;
|
||||
int card_type = device->card_type;
|
||||
u32 divs, duty;
|
||||
int ret;
|
||||
|
||||
|
@ -52,7 +53,7 @@ nvkm_fanpwm_get(struct nvkm_therm *obj)
|
|||
return (duty * 100) / divs;
|
||||
}
|
||||
|
||||
return gpio->get(gpio, 0, fan->func.func, fan->func.line) * 100;
|
||||
return nvkm_gpio_get(gpio, 0, fan->func.func, fan->func.line) * 100;
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
|
@ -39,8 +39,9 @@ static void
|
|||
nvkm_fantog_update(struct nvkm_fantog *fan, int percent)
|
||||
{
|
||||
struct nvkm_therm_priv *therm = (void *)fan->base.parent;
|
||||
struct nvkm_timer *tmr = nvkm_timer(therm);
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(therm);
|
||||
struct nvkm_device *device = therm->base.subdev.device;
|
||||
struct nvkm_timer *tmr = device->timer;
|
||||
struct nvkm_gpio *gpio = device->gpio;
|
||||
unsigned long flags;
|
||||
int duty;
|
||||
|
||||
|
@ -49,8 +50,8 @@ nvkm_fantog_update(struct nvkm_fantog *fan, int percent)
|
|||
percent = fan->percent;
|
||||
fan->percent = percent;
|
||||
|
||||
duty = !gpio->get(gpio, 0, DCB_GPIO_FAN, 0xff);
|
||||
gpio->set(gpio, 0, DCB_GPIO_FAN, 0xff, duty);
|
||||
duty = !nvkm_gpio_get(gpio, 0, DCB_GPIO_FAN, 0xff);
|
||||
nvkm_gpio_set(gpio, 0, DCB_GPIO_FAN, 0xff, duty);
|
||||
|
||||
if (list_empty(&fan->alarm.head) && percent != (duty * 100)) {
|
||||
u64 next_change = (percent * fan->period_us) / 100;
|
||||
|
|
|
@ -34,13 +34,13 @@ static const u8 tags[] = {
|
|||
int
|
||||
nvkm_voltgpio_get(struct nvkm_volt *volt)
|
||||
{
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(volt);
|
||||
struct nvkm_gpio *gpio = volt->subdev.device->gpio;
|
||||
u8 vid = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(tags); i++) {
|
||||
if (volt->vid_mask & (1 << i)) {
|
||||
int ret = gpio->get(gpio, 0, tags[i], 0xff);
|
||||
int ret = nvkm_gpio_get(gpio, 0, tags[i], 0xff);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
vid |= ret << i;
|
||||
|
@ -53,12 +53,12 @@ nvkm_voltgpio_get(struct nvkm_volt *volt)
|
|||
int
|
||||
nvkm_voltgpio_set(struct nvkm_volt *volt, u8 vid)
|
||||
{
|
||||
struct nvkm_gpio *gpio = nvkm_gpio(volt);
|
||||
struct nvkm_gpio *gpio = volt->subdev.device->gpio;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(tags); i++, vid >>= 1) {
|
||||
if (volt->vid_mask & (1 << i)) {
|
||||
int ret = gpio->set(gpio, 0, tags[i], 0xff, vid & 1);
|
||||
int ret = nvkm_gpio_set(gpio, 0, tags[i], 0xff, vid & 1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
@ -83,7 +83,7 @@ nvkm_voltgpio_init(struct nvkm_volt *volt)
|
|||
*/
|
||||
for (i = 0; i < ARRAY_SIZE(tags); i++) {
|
||||
if (volt->vid_mask & (1 << i)) {
|
||||
int ret = gpio->find(gpio, 0, tags[i], 0xff, &func);
|
||||
int ret = nvkm_gpio_find(gpio, 0, tags[i], 0xff, &func);
|
||||
if (ret) {
|
||||
if (ret != -ENOENT)
|
||||
return ret;
|
||||
|
|
Loading…
Reference in New Issue