mirror of https://gitee.com/openkylin/linux.git
Merge remote-tracking branch 'clk/clk-core-duty-cycle' into next/drivers
This commit is contained in:
Jerome Brunet
commit
2eb2a01b64
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@ -68,6 +68,7 @@ struct clk_core {
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unsigned long max_rate;
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unsigned long accuracy;
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int phase;
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struct clk_duty duty;
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struct hlist_head children;
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struct hlist_node child_node;
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struct hlist_head clks;
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@ -2402,6 +2403,172 @@ int clk_get_phase(struct clk *clk)
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}
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EXPORT_SYMBOL_GPL(clk_get_phase);
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static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
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{
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/* Assume a default value of 50% */
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core->duty.num = 1;
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core->duty.den = 2;
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}
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static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
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static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
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{
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struct clk_duty *duty = &core->duty;
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int ret = 0;
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if (!core->ops->get_duty_cycle)
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return clk_core_update_duty_cycle_parent_nolock(core);
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ret = core->ops->get_duty_cycle(core->hw, duty);
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if (ret)
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goto reset;
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/* Don't trust the clock provider too much */
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if (duty->den == 0 || duty->num > duty->den) {
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ret = -EINVAL;
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goto reset;
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}
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return 0;
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reset:
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clk_core_reset_duty_cycle_nolock(core);
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return ret;
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}
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static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
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{
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int ret = 0;
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if (core->parent &&
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core->flags & CLK_DUTY_CYCLE_PARENT) {
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ret = clk_core_update_duty_cycle_nolock(core->parent);
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memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
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} else {
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clk_core_reset_duty_cycle_nolock(core);
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}
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return ret;
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}
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static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
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struct clk_duty *duty);
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static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
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struct clk_duty *duty)
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{
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int ret;
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lockdep_assert_held(&prepare_lock);
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if (clk_core_rate_is_protected(core))
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return -EBUSY;
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trace_clk_set_duty_cycle(core, duty);
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if (!core->ops->set_duty_cycle)
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return clk_core_set_duty_cycle_parent_nolock(core, duty);
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ret = core->ops->set_duty_cycle(core->hw, duty);
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if (!ret)
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memcpy(&core->duty, duty, sizeof(*duty));
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trace_clk_set_duty_cycle_complete(core, duty);
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return ret;
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}
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static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
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struct clk_duty *duty)
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{
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int ret = 0;
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if (core->parent &&
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core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
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ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
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memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
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}
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return ret;
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}
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/**
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* clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
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* @clk: clock signal source
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* @num: numerator of the duty cycle ratio to be applied
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* @den: denominator of the duty cycle ratio to be applied
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*
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* Apply the duty cycle ratio if the ratio is valid and the clock can
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* perform this operation
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*
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* Returns (0) on success, a negative errno otherwise.
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*/
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int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
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{
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int ret;
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struct clk_duty duty;
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if (!clk)
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return 0;
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/* sanity check the ratio */
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if (den == 0 || num > den)
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return -EINVAL;
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duty.num = num;
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duty.den = den;
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clk_prepare_lock();
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if (clk->exclusive_count)
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clk_core_rate_unprotect(clk->core);
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ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
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if (clk->exclusive_count)
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clk_core_rate_protect(clk->core);
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clk_prepare_unlock();
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return ret;
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}
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EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
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static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
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unsigned int scale)
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{
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struct clk_duty *duty = &core->duty;
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int ret;
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clk_prepare_lock();
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ret = clk_core_update_duty_cycle_nolock(core);
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if (!ret)
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ret = mult_frac(scale, duty->num, duty->den);
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clk_prepare_unlock();
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return ret;
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}
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/**
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* clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
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* @clk: clock signal source
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* @scale: scaling factor to be applied to represent the ratio as an integer
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*
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* Returns the duty cycle ratio of a clock node multiplied by the provided
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* scaling factor, or negative errno on error.
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*/
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int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
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{
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if (!clk)
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return 0;
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return clk_core_get_scaled_duty_cycle(clk->core, scale);
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}
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EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
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/**
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* clk_is_match - check if two clk's point to the same hardware clock
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* @p: clk compared against q
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@ -2455,12 +2622,13 @@ static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
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if (!c)
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return;
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seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu %-3d\n",
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seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu %5d %6d\n",
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level * 3 + 1, "",
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30 - level * 3, c->name,
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c->enable_count, c->prepare_count, c->protect_count,
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clk_core_get_rate(c), clk_core_get_accuracy(c),
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clk_core_get_phase(c));
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clk_core_get_phase(c),
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clk_core_get_scaled_duty_cycle(c, 100000));
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}
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static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
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@ -2482,9 +2650,9 @@ static int clk_summary_show(struct seq_file *s, void *data)
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struct clk_core *c;
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struct hlist_head **lists = (struct hlist_head **)s->private;
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seq_puts(s, " enable prepare protect \n");
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seq_puts(s, " clock count count count rate accuracy phase\n");
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seq_puts(s, "----------------------------------------------------------------------------------------\n");
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seq_puts(s, " enable prepare protect duty\n");
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seq_puts(s, " clock count count count rate accuracy phase cycle\n");
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seq_puts(s, "---------------------------------------------------------------------------------------------\n");
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clk_prepare_lock();
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@ -2511,6 +2679,8 @@ static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
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seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
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seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
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seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
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seq_printf(s, "\"duty_cycle\": %u",
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clk_core_get_scaled_duty_cycle(c, 100000));
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}
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static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
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@ -2572,6 +2742,7 @@ static const struct {
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ENTRY(CLK_SET_RATE_UNGATE),
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ENTRY(CLK_IS_CRITICAL),
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ENTRY(CLK_OPS_PARENT_ENABLE),
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ENTRY(CLK_DUTY_CYCLE_PARENT),
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#undef ENTRY
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};
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@ -2610,6 +2781,17 @@ static int possible_parents_show(struct seq_file *s, void *data)
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}
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DEFINE_SHOW_ATTRIBUTE(possible_parents);
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static int clk_duty_cycle_show(struct seq_file *s, void *data)
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{
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struct clk_core *core = s->private;
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struct clk_duty *duty = &core->duty;
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seq_printf(s, "%u/%u\n", duty->num, duty->den);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
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static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
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{
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struct dentry *root;
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@ -2628,6 +2810,8 @@ static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
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debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
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debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
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debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
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debugfs_create_file("clk_duty_cycle", 0444, root, core,
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&clk_duty_cycle_fops);
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if (core->num_parents > 1)
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debugfs_create_file("clk_possible_parents", 0444, root, core,
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@ -2845,6 +3029,11 @@ static int __clk_core_init(struct clk_core *core)
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else
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core->phase = 0;
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/*
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* Set clk's duty cycle.
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*/
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clk_core_update_duty_cycle_nolock(core);
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/*
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* Set clk's rate. The preferred method is to use .recalc_rate. For
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* simple clocks and lazy developers the default fallback is to use the
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@ -38,6 +38,8 @@
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#define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */
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/* parents need enable during gate/ungate, set rate and re-parent */
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#define CLK_OPS_PARENT_ENABLE BIT(12)
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/* duty cycle call may be forwarded to the parent clock */
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#define CLK_DUTY_CYCLE_PARENT BIT(13)
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struct clk;
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struct clk_hw;
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@ -66,6 +68,17 @@ struct clk_rate_request {
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struct clk_hw *best_parent_hw;
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};
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/**
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* struct clk_duty - Struture encoding the duty cycle ratio of a clock
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*
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* @num: Numerator of the duty cycle ratio
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* @den: Denominator of the duty cycle ratio
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*/
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struct clk_duty {
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unsigned int num;
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unsigned int den;
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};
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/**
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* struct clk_ops - Callback operations for hardware clocks; these are to
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* be provided by the clock implementation, and will be called by drivers
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@ -169,6 +182,15 @@ struct clk_rate_request {
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* by the second argument. Valid values for degrees are
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* 0-359. Return 0 on success, otherwise -EERROR.
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*
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* @get_duty_cycle: Queries the hardware to get the current duty cycle ratio
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* of a clock. Returned values denominator cannot be 0 and must be
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* superior or equal to the numerator.
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*
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* @set_duty_cycle: Apply the duty cycle ratio to this clock signal specified by
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* the numerator (2nd argurment) and denominator (3rd argument).
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* Argument must be a valid ratio (denominator > 0
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* and >= numerator) Return 0 on success, otherwise -EERROR.
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*
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* @init: Perform platform-specific initialization magic.
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* This is not not used by any of the basic clock types.
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* Please consider other ways of solving initialization problems
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@ -218,6 +240,10 @@ struct clk_ops {
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unsigned long parent_accuracy);
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int (*get_phase)(struct clk_hw *hw);
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int (*set_phase)(struct clk_hw *hw, int degrees);
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int (*get_duty_cycle)(struct clk_hw *hw,
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struct clk_duty *duty);
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int (*set_duty_cycle)(struct clk_hw *hw,
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struct clk_duty *duty);
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void (*init)(struct clk_hw *hw);
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void (*debug_init)(struct clk_hw *hw, struct dentry *dentry);
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};
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@ -141,6 +141,27 @@ int clk_set_phase(struct clk *clk, int degrees);
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*/
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int clk_get_phase(struct clk *clk);
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/**
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* clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
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* @clk: clock signal source
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* @num: numerator of the duty cycle ratio to be applied
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* @den: denominator of the duty cycle ratio to be applied
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*
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* Adjust the duty cycle of a clock signal by the specified ratio. Returns 0 on
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* success, -EERROR otherwise.
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*/
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int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den);
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/**
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* clk_get_duty_cycle - return the duty cycle ratio of a clock signal
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* @clk: clock signal source
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* @scale: scaling factor to be applied to represent the ratio as an integer
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*
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* Returns the duty cycle ratio multiplied by the scale provided, otherwise
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* returns -EERROR.
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*/
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int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale);
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/**
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* clk_is_match - check if two clk's point to the same hardware clock
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* @p: clk compared against q
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@ -183,6 +204,18 @@ static inline long clk_get_phase(struct clk *clk)
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return -ENOTSUPP;
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}
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static inline int clk_set_duty_cycle(struct clk *clk, unsigned int num,
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unsigned int den)
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{
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return -ENOTSUPP;
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}
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static inline unsigned int clk_get_scaled_duty_cycle(struct clk *clk,
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unsigned int scale)
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{
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return 0;
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}
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static inline bool clk_is_match(const struct clk *p, const struct clk *q)
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{
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return p == q;
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@ -192,6 +192,42 @@ DEFINE_EVENT(clk_phase, clk_set_phase_complete,
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TP_ARGS(core, phase)
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);
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DECLARE_EVENT_CLASS(clk_duty_cycle,
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TP_PROTO(struct clk_core *core, struct clk_duty *duty),
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TP_ARGS(core, duty),
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TP_STRUCT__entry(
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__string( name, core->name )
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__field( unsigned int, num )
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__field( unsigned int, den )
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),
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TP_fast_assign(
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__assign_str(name, core->name);
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__entry->num = duty->num;
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__entry->den = duty->den;
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),
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TP_printk("%s %u/%u", __get_str(name), (unsigned int)__entry->num,
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(unsigned int)__entry->den)
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);
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DEFINE_EVENT(clk_duty_cycle, clk_set_duty_cycle,
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TP_PROTO(struct clk_core *core, struct clk_duty *duty),
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TP_ARGS(core, duty)
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);
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DEFINE_EVENT(clk_duty_cycle, clk_set_duty_cycle_complete,
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TP_PROTO(struct clk_core *core, struct clk_duty *duty),
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TP_ARGS(core, duty)
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);
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#endif /* _TRACE_CLK_H */
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/* This part must be outside protection */
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