mirror of https://gitee.com/openkylin/linux.git
ARM: dts: Add dts file for S3C6410-based SMDK6410 board
This patch adds basic device tree sources for SAMSUNG SMDK6410 board based on SAMSUNG S3C6410 SoC. Currently only UARTs, SD channel 0 and 100Mbps ethernet (SMSC911x) are supported. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -194,7 +194,8 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
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ste-ccu8540.dtb \
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ste-ccu8540.dtb \
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ste-ccu9540.dtb
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ste-ccu9540.dtb
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dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
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dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
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dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb
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dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
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s3c6410-smdk6410.dtb
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dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
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dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
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emev2-kzm9d-reference.dtb \
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emev2-kzm9d-reference.dtb \
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r8a7740-armadillo800eva.dtb \
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r8a7740-armadillo800eva.dtb \
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@ -0,0 +1,103 @@
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/*
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* Samsung S3C6410 based SMDK6410 board device tree source.
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*
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* Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
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*
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* Device tree source file for SAMSUNG SMDK6410 board which is based on
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* Samsung's S3C6410 SoC.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "s3c6410.dtsi"
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/ {
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model = "SAMSUNG SMDK6410 board based on S3C6410";
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compatible = "samsung,mini6410", "samsung,s3c6410";
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memory {
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reg = <0x50000000 0x8000000>;
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};
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chosen {
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bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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fin_pll: oscillator@0 {
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compatible = "fixed-clock";
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reg = <0>;
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clock-frequency = <12000000>;
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clock-output-names = "fin_pll";
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#clock-cells = <0>;
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};
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xusbxti: oscillator@1 {
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compatible = "fixed-clock";
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reg = <1>;
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clock-output-names = "xusbxti";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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};
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srom-cs1@18000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x18000000 0x8000000>;
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ranges;
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ethernet@18000000 {
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compatible = "smsc,lan9115";
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reg = <0x18000000 0x10000>;
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interrupt-parent = <&gpn>;
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interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
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phy-mode = "mii";
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reg-io-width = <4>;
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smsc,force-internal-phy;
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};
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};
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};
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&sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
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bus-width = <4>;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_data>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_data>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_data>;
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status = "okay";
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};
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