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[PATCH] i386: generate better code around descriptor update and access functions 

GCC can generate better code around descriptor update and access functions
when there is not an explicit "eax" register constraint.

Testing: You won't boot if this is messed up, since the TSS descriptor will be
corrupted.  Verified the assembler and booted.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Zachary Amsden 2005-09-03 15:56:38 -07:00 committed by Linus Torvalds
parent 4d37e7e3fd
commit 2f2984eb4a
1 changed files with 8 additions and 8 deletions
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16
include/asm-i386/desc.h
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@ -27,8 +27,8 @@ struct Xgt_desc_struct {
extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8)) #define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
#define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8)) #define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr)) #define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr)) #define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
@ -49,14 +49,14 @@ extern void set_intr_gate(unsigned int irq, void * addr);
#define _set_tssldt_desc(n,addr,limit,type) \ #define _set_tssldt_desc(n,addr,limit,type) \
__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \ __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
"movw %%ax,2(%2)\n\t" \ "movw %w1,2(%2)\n\t" \
"rorl $16,%%eax\n\t" \ "rorl $16,%1\n\t" \
"movb %%al,4(%2)\n\t" \ "movb %b1,4(%2)\n\t" \
"movb %4,5(%2)\n\t" \ "movb %4,5(%2)\n\t" \
"movb $0,6(%2)\n\t" \ "movb $0,6(%2)\n\t" \
"movb %%ah,7(%2)\n\t" \ "movb %h1,7(%2)\n\t" \
"rorl $16,%%eax" \ "rorl $16,%1" \
: "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type)) : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type))
static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
{ {