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ARM: sun7i: dt: Fix interrupt trigger types 

The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The
GIC can work on several interrupt triggers, and the A20 was actually setting it
up to use a rising edge as a trigger, while it was actually a level high
trigger, leading to some interrupts that would be completely ignored if the
edge was missed.

Fix this for the remaining DT nodes that slipped through.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: stable@vger.kernel.org
This commit is contained in:
Maxime Ripard 2014-02-01 16:46:16 +01:00
parent 38dbfb59d1
commit 2f41898704
1 changed files with 5 additions and 5 deletions
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10
arch/arm/boot/dts/sun7i-a20.dtsi
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@ -454,7 +454,7 @@ wdt: watchdog@01c20c90 {
rtc: rtc@01c20d00 {
compatible = "allwinner,sun7i-a20-rtc";
reg = <0x01c20d00 0x20>;
interrupts = <0 24 1>;
interrupts = <0 24 4>;
};
sid: eeprom@01c23800 {
@ -596,10 +596,10 @@ i2c4: i2c@01c2bc00 {
hstimer@01c60000 {
compatible = "allwinner,sun7i-a20-hstimer";
reg = <0x01c60000 0x1000>;
interrupts = <0 81 1>,
<0 82 1>,
<0 83 1>,
<0 84 1>;
interrupts = <0 81 4>,
<0 82 4>,
<0 83 4>,
<0 84 4>;
clocks = <&ahb_gates 28>;
};