mirror of https://gitee.com/openkylin/linux.git
drm/nouveau/therm: split the nv50 and nv84 code
This is needed because temperature management on nv50 can be enabled and it looks about the same as nv40. Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Martin Peres
Ben Skeggs
parent
897a6e27fd
commit
2f4573679a
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@ -126,6 +126,7 @@ nouveau-y += core/subdev/therm/ic.o
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nouveau-y += core/subdev/therm/temp.o
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nouveau-y += core/subdev/therm/nv40.o
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nouveau-y += core/subdev/therm/nv50.o
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nouveau-y += core/subdev/therm/nv84.o
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nouveau-y += core/subdev/therm/nva3.o
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nouveau-y += core/subdev/therm/nvd0.o
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nouveau-y += core/subdev/timer/base.o
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@ -73,6 +73,7 @@ int _nouveau_therm_fini(struct nouveau_object *, bool);
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extern struct nouveau_oclass nv40_therm_oclass;
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extern struct nouveau_oclass nv50_therm_oclass;
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extern struct nouveau_oclass nv84_therm_oclass;
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extern struct nouveau_oclass nva3_therm_oclass;
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extern struct nouveau_oclass nvd0_therm_oclass;
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@ -83,7 +83,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv50_mc_oclass;
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@ -109,7 +109,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv50_mc_oclass;
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@ -135,7 +135,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv50_mc_oclass;
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@ -161,7 +161,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv50_mc_oclass;
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@ -187,7 +187,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv50_mc_oclass;
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@ -213,7 +213,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv98_mc_oclass;
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@ -239,7 +239,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv50_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv98_mc_oclass;
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@ -265,7 +265,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv98_mc_oclass;
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@ -291,7 +291,7 @@ nv50_identify(struct nouveau_device *device)
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device->oclass[NVDEV_SUBDEV_GPIO ] = &nv50_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = &nv94_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv50_clock_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = &nv98_mc_oclass;
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@ -165,7 +165,7 @@ nv40_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty)
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return 0;
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}
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static void
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void
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nv40_therm_intr(struct nouveau_subdev *subdev)
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{
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struct nouveau_therm *therm = nouveau_therm(subdev);
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@ -124,141 +124,6 @@ nv50_temp_get(struct nouveau_therm *therm)
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return nv_rd32(therm, 0x20400);
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}
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static void
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nv50_therm_program_alarms(struct nouveau_therm *therm)
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{
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struct nouveau_therm_priv *priv = (void *)therm;
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struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
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unsigned long flags;
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spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
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/* enable RISING and FALLING IRQs for shutdown, THRS 0, 1, 2 and 4 */
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nv_wr32(therm, 0x20000, 0x000003ff);
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/* shutdown: The computer should be shutdown when reached */
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nv_wr32(therm, 0x20484, sensor->thrs_shutdown.hysteresis);
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nv_wr32(therm, 0x20480, sensor->thrs_shutdown.temp);
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/* THRS_1 : fan boost*/
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nv_wr32(therm, 0x204c4, sensor->thrs_fan_boost.temp);
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/* THRS_2 : critical */
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nv_wr32(therm, 0x204c0, sensor->thrs_critical.temp);
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/* THRS_4 : down clock */
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nv_wr32(therm, 0x20414, sensor->thrs_down_clock.temp);
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spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
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nv_info(therm,
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"Programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",
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sensor->thrs_fan_boost.temp, sensor->thrs_fan_boost.hysteresis,
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sensor->thrs_down_clock.temp,
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sensor->thrs_down_clock.hysteresis,
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sensor->thrs_critical.temp, sensor->thrs_critical.hysteresis,
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sensor->thrs_shutdown.temp, sensor->thrs_shutdown.hysteresis);
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}
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/* must be called with alarm_program_lock taken ! */
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static void
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nv50_therm_threshold_hyst_emulation(struct nouveau_therm *therm,
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uint32_t thrs_reg, u8 status_bit,
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const struct nvbios_therm_threshold *thrs,
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enum nouveau_therm_thrs thrs_name)
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{
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enum nouveau_therm_thrs_direction direction;
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enum nouveau_therm_thrs_state prev_state, new_state;
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int temp, cur;
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prev_state = nouveau_therm_sensor_get_threshold_state(therm, thrs_name);
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temp = nv_rd32(therm, thrs_reg);
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/* program the next threshold */
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if (temp == thrs->temp) {
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nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis);
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new_state = NOUVEAU_THERM_THRS_HIGHER;
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} else {
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nv_wr32(therm, thrs_reg, thrs->temp);
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new_state = NOUVEAU_THERM_THRS_LOWER;
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}
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/* fix the state (in case someone reprogrammed the alarms) */
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cur = therm->temp_get(therm);
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if (new_state == NOUVEAU_THERM_THRS_LOWER && cur > thrs->temp)
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new_state = NOUVEAU_THERM_THRS_HIGHER;
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else if (new_state == NOUVEAU_THERM_THRS_HIGHER &&
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cur < thrs->temp - thrs->hysteresis)
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new_state = NOUVEAU_THERM_THRS_LOWER;
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nouveau_therm_sensor_set_threshold_state(therm, thrs_name, new_state);
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/* find the direction */
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if (prev_state < new_state)
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direction = NOUVEAU_THERM_THRS_RISING;
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else if (prev_state > new_state)
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direction = NOUVEAU_THERM_THRS_FALLING;
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else
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return;
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/* advertise a change in direction */
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nouveau_therm_sensor_event(therm, thrs_name, direction);
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}
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static void
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nv50_therm_intr(struct nouveau_subdev *subdev)
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{
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struct nouveau_therm *therm = nouveau_therm(subdev);
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struct nouveau_therm_priv *priv = (void *)therm;
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struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
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unsigned long flags;
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uint32_t intr;
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spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
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intr = nv_rd32(therm, 0x20100);
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/* THRS_4: downclock */
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if (intr & 0x002) {
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nv50_therm_threshold_hyst_emulation(therm, 0x20414, 24,
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&sensor->thrs_down_clock,
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NOUVEAU_THERM_THRS_DOWNCLOCK);
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intr &= ~0x002;
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}
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/* shutdown */
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if (intr & 0x004) {
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nv50_therm_threshold_hyst_emulation(therm, 0x20480, 20,
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&sensor->thrs_shutdown,
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NOUVEAU_THERM_THRS_SHUTDOWN);
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intr &= ~0x004;
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}
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/* THRS_1 : fan boost */
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if (intr & 0x008) {
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nv50_therm_threshold_hyst_emulation(therm, 0x204c4, 21,
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&sensor->thrs_fan_boost,
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NOUVEAU_THERM_THRS_FANBOOST);
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intr &= ~0x008;
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}
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/* THRS_2 : critical */
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if (intr & 0x010) {
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nv50_therm_threshold_hyst_emulation(therm, 0x204c0, 22,
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&sensor->thrs_critical,
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NOUVEAU_THERM_THRS_CRITICAL);
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intr &= ~0x010;
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}
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if (intr)
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nv_error(therm, "unhandled intr 0x%08x\n", intr);
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/* ACK everything */
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nv_wr32(therm, 0x20100, 0xffffffff);
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nv_wr32(therm, 0x1100, 0x10000); /* PBUS */
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spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
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}
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static int
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nv50_therm_ctor(struct nouveau_object *parent,
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struct nouveau_object *engine,
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@ -278,22 +143,8 @@ nv50_therm_ctor(struct nouveau_object *parent,
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priv->base.base.pwm_set = nv50_fan_pwm_set;
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priv->base.base.pwm_clock = nv50_fan_pwm_clock;
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priv->base.base.temp_get = nv50_temp_get;
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priv->base.sensor.program_alarms = nv50_therm_program_alarms;
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nv_subdev(priv)->intr = nv50_therm_intr;
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/* init the thresholds */
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nouveau_therm_sensor_set_threshold_state(&priv->base.base,
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NOUVEAU_THERM_THRS_SHUTDOWN,
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NOUVEAU_THERM_THRS_LOWER);
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nouveau_therm_sensor_set_threshold_state(&priv->base.base,
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NOUVEAU_THERM_THRS_FANBOOST,
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NOUVEAU_THERM_THRS_LOWER);
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nouveau_therm_sensor_set_threshold_state(&priv->base.base,
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NOUVEAU_THERM_THRS_CRITICAL,
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NOUVEAU_THERM_THRS_LOWER);
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nouveau_therm_sensor_set_threshold_state(&priv->base.base,
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NOUVEAU_THERM_THRS_DOWNCLOCK,
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NOUVEAU_THERM_THRS_LOWER);
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priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling;
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nv_subdev(priv)->intr = nv40_therm_intr;
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return nouveau_therm_preinit(&priv->base.base);
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}
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@ -0,0 +1,221 @@
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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* Martin Peres
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*/
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#include "priv.h"
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struct nv84_therm_priv {
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struct nouveau_therm_priv base;
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};
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int
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nv84_temp_get(struct nouveau_therm *therm)
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{
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return nv_rd32(therm, 0x20400);
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}
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static void
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nv84_therm_program_alarms(struct nouveau_therm *therm)
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{
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struct nouveau_therm_priv *priv = (void *)therm;
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struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
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unsigned long flags;
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spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
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/* enable RISING and FALLING IRQs for shutdown, THRS 0, 1, 2 and 4 */
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nv_wr32(therm, 0x20000, 0x000003ff);
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/* shutdown: The computer should be shutdown when reached */
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nv_wr32(therm, 0x20484, sensor->thrs_shutdown.hysteresis);
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nv_wr32(therm, 0x20480, sensor->thrs_shutdown.temp);
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/* THRS_1 : fan boost*/
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nv_wr32(therm, 0x204c4, sensor->thrs_fan_boost.temp);
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/* THRS_2 : critical */
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nv_wr32(therm, 0x204c0, sensor->thrs_critical.temp);
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/* THRS_4 : down clock */
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nv_wr32(therm, 0x20414, sensor->thrs_down_clock.temp);
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spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
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nv_info(therm,
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"Programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",
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sensor->thrs_fan_boost.temp, sensor->thrs_fan_boost.hysteresis,
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sensor->thrs_down_clock.temp,
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sensor->thrs_down_clock.hysteresis,
|
||||
sensor->thrs_critical.temp, sensor->thrs_critical.hysteresis,
|
||||
sensor->thrs_shutdown.temp, sensor->thrs_shutdown.hysteresis);
|
||||
|
||||
}
|
||||
|
||||
/* must be called with alarm_program_lock taken ! */
|
||||
static void
|
||||
nv84_therm_threshold_hyst_emulation(struct nouveau_therm *therm,
|
||||
uint32_t thrs_reg, u8 status_bit,
|
||||
const struct nvbios_therm_threshold *thrs,
|
||||
enum nouveau_therm_thrs thrs_name)
|
||||
{
|
||||
enum nouveau_therm_thrs_direction direction;
|
||||
enum nouveau_therm_thrs_state prev_state, new_state;
|
||||
int temp, cur;
|
||||
|
||||
prev_state = nouveau_therm_sensor_get_threshold_state(therm, thrs_name);
|
||||
temp = nv_rd32(therm, thrs_reg);
|
||||
|
||||
/* program the next threshold */
|
||||
if (temp == thrs->temp) {
|
||||
nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis);
|
||||
new_state = NOUVEAU_THERM_THRS_HIGHER;
|
||||
} else {
|
||||
nv_wr32(therm, thrs_reg, thrs->temp);
|
||||
new_state = NOUVEAU_THERM_THRS_LOWER;
|
||||
}
|
||||
|
||||
/* fix the state (in case someone reprogrammed the alarms) */
|
||||
cur = therm->temp_get(therm);
|
||||
if (new_state == NOUVEAU_THERM_THRS_LOWER && cur > thrs->temp)
|
||||
new_state = NOUVEAU_THERM_THRS_HIGHER;
|
||||
else if (new_state == NOUVEAU_THERM_THRS_HIGHER &&
|
||||
cur < thrs->temp - thrs->hysteresis)
|
||||
new_state = NOUVEAU_THERM_THRS_LOWER;
|
||||
nouveau_therm_sensor_set_threshold_state(therm, thrs_name, new_state);
|
||||
|
||||
/* find the direction */
|
||||
if (prev_state < new_state)
|
||||
direction = NOUVEAU_THERM_THRS_RISING;
|
||||
else if (prev_state > new_state)
|
||||
direction = NOUVEAU_THERM_THRS_FALLING;
|
||||
else
|
||||
return;
|
||||
|
||||
/* advertise a change in direction */
|
||||
nouveau_therm_sensor_event(therm, thrs_name, direction);
|
||||
}
|
||||
|
||||
static void
|
||||
nv84_therm_intr(struct nouveau_subdev *subdev)
|
||||
{
|
||||
struct nouveau_therm *therm = nouveau_therm(subdev);
|
||||
struct nouveau_therm_priv *priv = (void *)therm;
|
||||
struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
|
||||
unsigned long flags;
|
||||
uint32_t intr;
|
||||
|
||||
spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
|
||||
|
||||
intr = nv_rd32(therm, 0x20100);
|
||||
|
||||
/* THRS_4: downclock */
|
||||
if (intr & 0x002) {
|
||||
nv84_therm_threshold_hyst_emulation(therm, 0x20414, 24,
|
||||
&sensor->thrs_down_clock,
|
||||
NOUVEAU_THERM_THRS_DOWNCLOCK);
|
||||
intr &= ~0x002;
|
||||
}
|
||||
|
||||
/* shutdown */
|
||||
if (intr & 0x004) {
|
||||
nv84_therm_threshold_hyst_emulation(therm, 0x20480, 20,
|
||||
&sensor->thrs_shutdown,
|
||||
NOUVEAU_THERM_THRS_SHUTDOWN);
|
||||
intr &= ~0x004;
|
||||
}
|
||||
|
||||
/* THRS_1 : fan boost */
|
||||
if (intr & 0x008) {
|
||||
nv84_therm_threshold_hyst_emulation(therm, 0x204c4, 21,
|
||||
&sensor->thrs_fan_boost,
|
||||
NOUVEAU_THERM_THRS_FANBOOST);
|
||||
intr &= ~0x008;
|
||||
}
|
||||
|
||||
/* THRS_2 : critical */
|
||||
if (intr & 0x010) {
|
||||
nv84_therm_threshold_hyst_emulation(therm, 0x204c0, 22,
|
||||
&sensor->thrs_critical,
|
||||
NOUVEAU_THERM_THRS_CRITICAL);
|
||||
intr &= ~0x010;
|
||||
}
|
||||
|
||||
if (intr)
|
||||
nv_error(therm, "unhandled intr 0x%08x\n", intr);
|
||||
|
||||
/* ACK everything */
|
||||
nv_wr32(therm, 0x20100, 0xffffffff);
|
||||
nv_wr32(therm, 0x1100, 0x10000); /* PBUS */
|
||||
|
||||
spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
|
||||
}
|
||||
|
||||
static int
|
||||
nv84_therm_ctor(struct nouveau_object *parent,
|
||||
struct nouveau_object *engine,
|
||||
struct nouveau_oclass *oclass, void *data, u32 size,
|
||||
struct nouveau_object **pobject)
|
||||
{
|
||||
struct nv84_therm_priv *priv;
|
||||
int ret;
|
||||
|
||||
ret = nouveau_therm_create(parent, engine, oclass, &priv);
|
||||
*pobject = nv_object(priv);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
priv->base.base.pwm_ctrl = nv50_fan_pwm_ctrl;
|
||||
priv->base.base.pwm_get = nv50_fan_pwm_get;
|
||||
priv->base.base.pwm_set = nv50_fan_pwm_set;
|
||||
priv->base.base.pwm_clock = nv50_fan_pwm_clock;
|
||||
priv->base.base.temp_get = nv84_temp_get;
|
||||
priv->base.sensor.program_alarms = nv84_therm_program_alarms;
|
||||
nv_subdev(priv)->intr = nv84_therm_intr;
|
||||
|
||||
/* init the thresholds */
|
||||
nouveau_therm_sensor_set_threshold_state(&priv->base.base,
|
||||
NOUVEAU_THERM_THRS_SHUTDOWN,
|
||||
NOUVEAU_THERM_THRS_LOWER);
|
||||
nouveau_therm_sensor_set_threshold_state(&priv->base.base,
|
||||
NOUVEAU_THERM_THRS_FANBOOST,
|
||||
NOUVEAU_THERM_THRS_LOWER);
|
||||
nouveau_therm_sensor_set_threshold_state(&priv->base.base,
|
||||
NOUVEAU_THERM_THRS_CRITICAL,
|
||||
NOUVEAU_THERM_THRS_LOWER);
|
||||
nouveau_therm_sensor_set_threshold_state(&priv->base.base,
|
||||
NOUVEAU_THERM_THRS_DOWNCLOCK,
|
||||
NOUVEAU_THERM_THRS_LOWER);
|
||||
|
||||
return nouveau_therm_preinit(&priv->base.base);
|
||||
}
|
||||
|
||||
struct nouveau_oclass
|
||||
nv84_therm_oclass = {
|
||||
.handle = NV_SUBDEV(THERM, 0x84),
|
||||
.ofuncs = &(struct nouveau_ofuncs) {
|
||||
.ctor = nv84_therm_ctor,
|
||||
.dtor = _nouveau_therm_dtor,
|
||||
.init = _nouveau_therm_init,
|
||||
.fini = _nouveau_therm_fini,
|
||||
},
|
||||
};
|
||||
|
|
@ -81,7 +81,7 @@ nva3_therm_ctor(struct nouveau_object *parent,
|
|||
priv->base.base.pwm_get = nv50_fan_pwm_get;
|
||||
priv->base.base.pwm_set = nv50_fan_pwm_set;
|
||||
priv->base.base.pwm_clock = nv50_fan_pwm_clock;
|
||||
priv->base.base.temp_get = nv50_temp_get;
|
||||
priv->base.base.temp_get = nv84_temp_get;
|
||||
priv->base.base.fan_sense = nva3_therm_fan_sense;
|
||||
priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling;
|
||||
return nouveau_therm_preinit(&priv->base.base);
|
||||
|
|
|
|||
|
|
@ -135,7 +135,7 @@ nvd0_therm_ctor(struct nouveau_object *parent,
|
|||
priv->base.base.pwm_get = nvd0_fan_pwm_get;
|
||||
priv->base.base.pwm_set = nvd0_fan_pwm_set;
|
||||
priv->base.base.pwm_clock = nvd0_fan_pwm_clock;
|
||||
priv->base.base.temp_get = nv50_temp_get;
|
||||
priv->base.base.temp_get = nv84_temp_get;
|
||||
priv->base.base.fan_sense = nva3_therm_fan_sense;
|
||||
priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling;
|
||||
return nouveau_therm_preinit(&priv->base.base);
|
||||
|
|
|
|||
|
|
@ -134,11 +134,12 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm,
|
|||
enum nouveau_therm_thrs_direction dir);
|
||||
void nouveau_therm_program_alarms_polling(struct nouveau_therm *therm);
|
||||
|
||||
void nv40_therm_intr(struct nouveau_subdev *);
|
||||
int nv50_fan_pwm_ctrl(struct nouveau_therm *, int, bool);
|
||||
int nv50_fan_pwm_get(struct nouveau_therm *, int, u32 *, u32 *);
|
||||
int nv50_fan_pwm_set(struct nouveau_therm *, int, u32, u32);
|
||||
int nv50_fan_pwm_clock(struct nouveau_therm *);
|
||||
int nv50_temp_get(struct nouveau_therm *therm);
|
||||
int nv84_temp_get(struct nouveau_therm *therm);
|
||||
|
||||
int nva3_therm_fan_sense(struct nouveau_therm *);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue