mirror of https://gitee.com/openkylin/linux.git
ARM: S3C64XX: Squash SDHCI setup into one file
Squash the SDHCI setup for both the S3C6400 and S3C6410 into one file and make the S3C6410 case use the S3C6400 code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
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97ce9d6938
commit
2f6c2ac1d9
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@ -19,17 +19,12 @@ config CPU_S3C6410
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help
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help
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Enable S3C6410 CPU support
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Enable S3C6410 CPU support
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config S3C6400_SETUP_SDHCI
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config S3C64XX_SETUP_SDHCI
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bool
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help
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Internal configuration for default SDHCI
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setup for S3C6400.
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config S3C6410_SETUP_SDHCI
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bool
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select S3C64XX_SETUP_SDHCI_GPIO
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select S3C64XX_SETUP_SDHCI_GPIO
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bool
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help
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help
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Internal helper functions for S3C6410 based SDHCI systems
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Internal configuration for default SDHCI setup for S3C6400 and
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S3C6410 SoCs.
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# S36400 Macchine support
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# S36400 Macchine support
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@ -38,7 +33,7 @@ config MACH_SMDK6400
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select CPU_S3C6400
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select CPU_S3C6400
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select S3C_DEV_HSMMC
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select S3C_DEV_HSMMC
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select S3C_DEV_NAND
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select S3C_DEV_NAND
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select S3C6400_SETUP_SDHCI
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select S3C64XX_SETUP_SDHCI
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help
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help
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Machine support for the Samsung SMDK6400
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Machine support for the Samsung SMDK6400
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@ -61,7 +56,7 @@ config MACH_SMDK6410
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select S3C_DEV_FB
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select S3C_DEV_FB
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select S3C_DEV_USB_HOST
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select S3C_DEV_USB_HOST
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select S3C_DEV_USB_HSOTG
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select S3C_DEV_USB_HSOTG
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select S3C6410_SETUP_SDHCI
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select S3C64XX_SETUP_SDHCI
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select S3C64XX_SETUP_I2C1
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select S3C64XX_SETUP_I2C1
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select S3C64XX_SETUP_FB_24BPP
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select S3C64XX_SETUP_FB_24BPP
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help
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help
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@ -17,8 +17,7 @@ obj-$(CONFIG_CPU_S3C6410) += s3c6410.o
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# setup support
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# setup support
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obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci-s3c6400.o
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obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
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obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci-s3c6410.o
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# Machine support
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# Machine support
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@ -1,68 +0,0 @@
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/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
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*
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* Copyright 2008 Simtec Electronics
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/host.h>
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#include <plat/regs-sdhci.h>
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#include <plat/sdhci.h>
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/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
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char *s3c6410_hsmmc_clksrcs[4] = {
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[0] = "hsmmc",
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[1] = "hsmmc",
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[2] = "mmc_bus",
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/* [3] = "48m", - note not successfully used yet */
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};
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void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
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void __iomem *r,
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struct mmc_ios *ios,
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struct mmc_card *card)
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{
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u32 ctrl2, ctrl3;
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/* don't need to alter anything acording to card-type */
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writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
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ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
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ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
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ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
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S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
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S3C_SDHCI_CTRL2_ENFBCLKRX |
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S3C_SDHCI_CTRL2_DFCNT_NONE |
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S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
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if (ios->clock < 25 * 1000000)
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ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
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S3C_SDHCI_CTRL3_FCSEL2 |
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S3C_SDHCI_CTRL3_FCSEL1 |
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S3C_SDHCI_CTRL3_FCSEL0);
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else
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ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
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printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
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writel(ctrl2, r + S3C_SDHCI_CONTROL2);
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writel(ctrl3, r + S3C_SDHCI_CONTROL3);
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}
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@ -5,7 +5,7 @@
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* Ben Dooks <ben@simtec.co.uk>
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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* http://armlinux.simtec.co.uk/
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*
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*
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* S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
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* S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* it under the terms of the GNU General Public License version 2 as
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@ -26,7 +26,7 @@
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/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
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/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
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char *s3c6400_hsmmc_clksrcs[4] = {
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char *s3c64xx_hsmmc_clksrcs[4] = {
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[0] = "hsmmc",
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[0] = "hsmmc",
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[1] = "hsmmc",
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[1] = "hsmmc",
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[2] = "mmc_bus",
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[2] = "mmc_bus",
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@ -61,3 +61,12 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
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writel(ctrl3, r + S3C_SDHCI_CONTROL3);
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writel(ctrl3, r + S3C_SDHCI_CONTROL3);
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}
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}
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void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
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void __iomem *r,
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struct mmc_ios *ios,
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struct mmc_card *card)
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{
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writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
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s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
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}
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@ -78,8 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
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/* S3C6400 SDHCI setup */
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/* S3C6400 SDHCI setup */
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#ifdef CONFIG_S3C6400_SETUP_SDHCI
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#ifdef CONFIG_S3C64XX_SETUP_SDHCI
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extern char *s3c6400_hsmmc_clksrcs[4];
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extern char *s3c64xx_hsmmc_clksrcs[4];
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#ifdef CONFIG_S3C_DEV_HSMMC
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#ifdef CONFIG_S3C_DEV_HSMMC
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extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
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extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
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@ -89,7 +89,7 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
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static inline void s3c6400_default_sdhci0(void)
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static inline void s3c6400_default_sdhci0(void)
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{
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{
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s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
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s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
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s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
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s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
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s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
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s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
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}
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}
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@ -101,7 +101,7 @@ static inline void s3c6400_default_sdhci0(void) { }
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#ifdef CONFIG_S3C_DEV_HSMMC1
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#ifdef CONFIG_S3C_DEV_HSMMC1
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static inline void s3c6400_default_sdhci1(void)
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static inline void s3c6400_default_sdhci1(void)
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{
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{
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s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
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s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
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s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
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s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
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s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
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s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
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}
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}
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@ -112,7 +112,7 @@ static inline void s3c6400_default_sdhci1(void) { }
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#ifdef CONFIG_S3C_DEV_HSMMC2
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#ifdef CONFIG_S3C_DEV_HSMMC2
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static inline void s3c6400_default_sdhci2(void)
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static inline void s3c6400_default_sdhci2(void)
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{
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{
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s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
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s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
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s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
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s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
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s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
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s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
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}
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}
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@ -120,27 +120,19 @@ static inline void s3c6400_default_sdhci2(void)
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static inline void s3c6400_default_sdhci2(void) { }
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static inline void s3c6400_default_sdhci2(void) { }
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#endif /* CONFIG_S3C_DEV_HSMMC2 */
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#endif /* CONFIG_S3C_DEV_HSMMC2 */
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#else
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static inline void s3c6400_default_sdhci0(void) { }
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static inline void s3c6400_default_sdhci1(void) { }
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#endif /* CONFIG_S3C6400_SETUP_SDHCI */
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/* S3C6410 SDHCI setup */
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/* S3C6410 SDHCI setup */
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#ifdef CONFIG_S3C6410_SETUP_SDHCI
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extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
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extern char *s3c6410_hsmmc_clksrcs[4];
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void __iomem *r,
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struct mmc_ios *ios,
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extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
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struct mmc_card *card);
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void __iomem *r,
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struct mmc_ios *ios,
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struct mmc_card *card);
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#ifdef CONFIG_S3C_DEV_HSMMC
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#ifdef CONFIG_S3C_DEV_HSMMC
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static inline void s3c6410_default_sdhci0(void)
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static inline void s3c6410_default_sdhci0(void)
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{
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{
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s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
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s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
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s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
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s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
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s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
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s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
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}
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}
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#else
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#else
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static inline void s3c6410_default_sdhci0(void) { }
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static inline void s3c6410_default_sdhci0(void) { }
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#ifdef CONFIG_S3C_DEV_HSMMC1
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#ifdef CONFIG_S3C_DEV_HSMMC1
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static inline void s3c6410_default_sdhci1(void)
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static inline void s3c6410_default_sdhci1(void)
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{
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{
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s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
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s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
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s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
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s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
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s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
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s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
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}
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}
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#else
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#else
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static inline void s3c6410_default_sdhci1(void) { }
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static inline void s3c6410_default_sdhci1(void) { }
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#ifdef CONFIG_S3C_DEV_HSMMC2
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#ifdef CONFIG_S3C_DEV_HSMMC2
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static inline void s3c6410_default_sdhci2(void)
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static inline void s3c6410_default_sdhci2(void)
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{
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{
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s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
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s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
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s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
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s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
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s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
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s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
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}
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}
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#else
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#else
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static inline void s3c6410_default_sdhci2(void) { }
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static inline void s3c6410_default_sdhci2(void) { }
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#else
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#else
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static inline void s3c6410_default_sdhci0(void) { }
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static inline void s3c6410_default_sdhci0(void) { }
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static inline void s3c6410_default_sdhci1(void) { }
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static inline void s3c6410_default_sdhci1(void) { }
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#endif /* CONFIG_S3C6410_SETUP_SDHCI */
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static inline void s3c6400_default_sdhci0(void) { }
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static inline void s3c6400_default_sdhci1(void) { }
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#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
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/* S5PC100 SDHCI setup */
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/* S5PC100 SDHCI setup */
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