mirror of https://gitee.com/openkylin/linux.git
drm/i915: add clock gating regs to VLV offset check function
So we can write them properly. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Antti Koskipää <antti.koskipaa@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1133,8 +1133,17 @@ static bool IS_DISPLAYREG(u32 reg)
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return false;
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switch (reg) {
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case _3D_CHICKEN3:
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case IVB_CHICKEN3:
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case GEN7_COMMON_SLICE_CHICKEN1:
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case GEN7_L3CNTLREG1:
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case GEN7_L3_CHICKEN_MODE_REGISTER:
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case GEN7_ROW_CHICKEN2:
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case GEN7_L3SQCREG4:
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case GEN7_SQ_CHICKEN_MBCUNIT_CONFIG:
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case GEN7_HALF_SLICE_CHICKEN1:
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case GEN6_MBCTL:
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case GEN6_UCGCTL2:
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return false;
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default:
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break;
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