mirror of https://gitee.com/openkylin/linux.git
Merge remote-tracking branches 'spi/fix/fsl-dspi', 'spi/fix/imx' and 'spi/fix/rockchip' into spi-linus
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commit
31d25e5cda
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@ -148,23 +148,32 @@ static void hz_to_spi_baud(char *pbr, char *br, int speed_hz,
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16, 32, 64, 128,
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16, 32, 64, 128,
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256, 512, 1024, 2048,
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256, 512, 1024, 2048,
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4096, 8192, 16384, 32768 };
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4096, 8192, 16384, 32768 };
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int temp, i = 0, j = 0;
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int scale_needed, scale, minscale = INT_MAX;
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int i, j;
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temp = clkrate / 2 / speed_hz;
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scale_needed = clkrate / speed_hz;
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if (clkrate % speed_hz)
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scale_needed++;
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for (i = 0; i < ARRAY_SIZE(pbr_tbl); i++)
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for (i = 0; i < ARRAY_SIZE(brs); i++)
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for (j = 0; j < ARRAY_SIZE(brs); j++) {
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for (j = 0; j < ARRAY_SIZE(pbr_tbl); j++) {
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if (pbr_tbl[i] * brs[j] >= temp) {
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scale = brs[i] * pbr_tbl[j];
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*pbr = i;
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if (scale >= scale_needed) {
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*br = j;
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if (scale < minscale) {
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return;
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minscale = scale;
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*br = i;
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*pbr = j;
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}
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break;
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}
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}
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}
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}
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pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld\
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if (minscale == INT_MAX) {
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,we use the max prescaler value.\n", speed_hz, clkrate);
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pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld, we use the max prescaler value.\n",
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*pbr = ARRAY_SIZE(pbr_tbl) - 1;
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speed_hz, clkrate);
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*br = ARRAY_SIZE(brs) - 1;
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*pbr = ARRAY_SIZE(pbr_tbl) - 1;
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*br = ARRAY_SIZE(brs) - 1;
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}
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}
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}
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static int dspi_transfer_write(struct fsl_dspi *dspi)
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static int dspi_transfer_write(struct fsl_dspi *dspi)
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@ -370,8 +370,6 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
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if (spi_imx->dma_is_inited) {
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if (spi_imx->dma_is_inited) {
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dma = readl(spi_imx->base + MX51_ECSPI_DMA);
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dma = readl(spi_imx->base + MX51_ECSPI_DMA);
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spi_imx->tx_wml = spi_imx_get_fifosize(spi_imx) / 2;
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spi_imx->rx_wml = spi_imx_get_fifosize(spi_imx) / 2;
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spi_imx->rxt_wml = spi_imx_get_fifosize(spi_imx) / 2;
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spi_imx->rxt_wml = spi_imx_get_fifosize(spi_imx) / 2;
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rx_wml_cfg = spi_imx->rx_wml << MX51_ECSPI_DMA_RX_WML_OFFSET;
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rx_wml_cfg = spi_imx->rx_wml << MX51_ECSPI_DMA_RX_WML_OFFSET;
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tx_wml_cfg = spi_imx->tx_wml << MX51_ECSPI_DMA_TX_WML_OFFSET;
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tx_wml_cfg = spi_imx->tx_wml << MX51_ECSPI_DMA_TX_WML_OFFSET;
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@ -868,6 +866,8 @@ static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx,
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master->max_dma_len = MAX_SDMA_BD_BYTES;
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master->max_dma_len = MAX_SDMA_BD_BYTES;
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spi_imx->bitbang.master->flags = SPI_MASTER_MUST_RX |
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spi_imx->bitbang.master->flags = SPI_MASTER_MUST_RX |
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SPI_MASTER_MUST_TX;
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SPI_MASTER_MUST_TX;
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spi_imx->tx_wml = spi_imx_get_fifosize(spi_imx) / 2;
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spi_imx->rx_wml = spi_imx_get_fifosize(spi_imx) / 2;
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spi_imx->dma_is_inited = 1;
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spi_imx->dma_is_inited = 1;
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return 0;
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return 0;
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@ -519,7 +519,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
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}
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}
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/* div doesn't support odd number */
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/* div doesn't support odd number */
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div = max_t(u32, rs->max_freq / rs->speed, 1);
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div = DIV_ROUND_UP(rs->max_freq, rs->speed);
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div = (div + 1) & 0xfffe;
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div = (div + 1) & 0xfffe;
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writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
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writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
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