Merge remote-tracking branches 'spi/fix/fsl-dspi', 'spi/fix/imx' and 'spi/fix/rockchip' into spi-linus

This commit is contained in:
Mark Brown 2015-04-11 23:08:56 +01:00
commit 31d25e5cda
3 changed files with 24 additions and 15 deletions

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@ -148,23 +148,32 @@ static void hz_to_spi_baud(char *pbr, char *br, int speed_hz,
16, 32, 64, 128, 16, 32, 64, 128,
256, 512, 1024, 2048, 256, 512, 1024, 2048,
4096, 8192, 16384, 32768 }; 4096, 8192, 16384, 32768 };
int temp, i = 0, j = 0; int scale_needed, scale, minscale = INT_MAX;
int i, j;
temp = clkrate / 2 / speed_hz; scale_needed = clkrate / speed_hz;
if (clkrate % speed_hz)
scale_needed++;
for (i = 0; i < ARRAY_SIZE(pbr_tbl); i++) for (i = 0; i < ARRAY_SIZE(brs); i++)
for (j = 0; j < ARRAY_SIZE(brs); j++) { for (j = 0; j < ARRAY_SIZE(pbr_tbl); j++) {
if (pbr_tbl[i] * brs[j] >= temp) { scale = brs[i] * pbr_tbl[j];
*pbr = i; if (scale >= scale_needed) {
*br = j; if (scale < minscale) {
return; minscale = scale;
*br = i;
*pbr = j;
}
break;
} }
} }
pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld\ if (minscale == INT_MAX) {
,we use the max prescaler value.\n", speed_hz, clkrate); pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld, we use the max prescaler value.\n",
*pbr = ARRAY_SIZE(pbr_tbl) - 1; speed_hz, clkrate);
*br = ARRAY_SIZE(brs) - 1; *pbr = ARRAY_SIZE(pbr_tbl) - 1;
*br = ARRAY_SIZE(brs) - 1;
}
} }
static int dspi_transfer_write(struct fsl_dspi *dspi) static int dspi_transfer_write(struct fsl_dspi *dspi)

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@ -370,8 +370,6 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
if (spi_imx->dma_is_inited) { if (spi_imx->dma_is_inited) {
dma = readl(spi_imx->base + MX51_ECSPI_DMA); dma = readl(spi_imx->base + MX51_ECSPI_DMA);
spi_imx->tx_wml = spi_imx_get_fifosize(spi_imx) / 2;
spi_imx->rx_wml = spi_imx_get_fifosize(spi_imx) / 2;
spi_imx->rxt_wml = spi_imx_get_fifosize(spi_imx) / 2; spi_imx->rxt_wml = spi_imx_get_fifosize(spi_imx) / 2;
rx_wml_cfg = spi_imx->rx_wml << MX51_ECSPI_DMA_RX_WML_OFFSET; rx_wml_cfg = spi_imx->rx_wml << MX51_ECSPI_DMA_RX_WML_OFFSET;
tx_wml_cfg = spi_imx->tx_wml << MX51_ECSPI_DMA_TX_WML_OFFSET; tx_wml_cfg = spi_imx->tx_wml << MX51_ECSPI_DMA_TX_WML_OFFSET;
@ -868,6 +866,8 @@ static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx,
master->max_dma_len = MAX_SDMA_BD_BYTES; master->max_dma_len = MAX_SDMA_BD_BYTES;
spi_imx->bitbang.master->flags = SPI_MASTER_MUST_RX | spi_imx->bitbang.master->flags = SPI_MASTER_MUST_RX |
SPI_MASTER_MUST_TX; SPI_MASTER_MUST_TX;
spi_imx->tx_wml = spi_imx_get_fifosize(spi_imx) / 2;
spi_imx->rx_wml = spi_imx_get_fifosize(spi_imx) / 2;
spi_imx->dma_is_inited = 1; spi_imx->dma_is_inited = 1;
return 0; return 0;

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@ -519,7 +519,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
} }
/* div doesn't support odd number */ /* div doesn't support odd number */
div = max_t(u32, rs->max_freq / rs->speed, 1); div = DIV_ROUND_UP(rs->max_freq, rs->speed);
div = (div + 1) & 0xfffe; div = (div + 1) & 0xfffe;
writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);