mirror of https://gitee.com/openkylin/linux.git
arm64: dts: marvell: mcbin: add pinctrl nodes
Add pinctrl nodes to describe the CPM I2C0 and CPS SPI1 settings. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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@ -112,10 +112,14 @@ &ap_sdhci0 {
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&cpm_i2c0 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_i2c0_pins>;
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status = "okay";
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};
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&cpm_mdio {
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_ge_mdio_pins>;
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status = "okay";
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ge_phy: ethernet-phy@0 {
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@ -123,6 +127,22 @@ ge_phy: ethernet-phy@0 {
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};
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};
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&cpm_pinctrl {
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cpm_ge_mdio_pins: ge-mdio-pins {
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marvell,pins = "mpp32", "mpp34";
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marvell,function = "ge";
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};
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cpm_i2c0_pins: i2c0-pins {
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marvell,pins = "mpp37", "mpp38";
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marvell,function = "i2c0";
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};
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cpm_sdhci_pins: sdhci-pins {
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marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
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"mpp60", "mpp61";
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marvell,function = "sdio";
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};
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};
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&cpm_sata0 {
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/* CPM Lane 0 - U29 */
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status = "okay";
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@ -132,6 +152,8 @@ &cpm_sdhci0 {
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/* U6 */
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broken-cd;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_sdhci_pins>;
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status = "okay";
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vqmmc-supply = <&v_3_3>;
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};
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@ -157,6 +179,13 @@ &cps_eth1 {
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phy-mode = "sgmii";
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};
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&cps_pinctrl {
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cps_spi1_pins: spi1-pins {
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marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";
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marvell,function = "spi1";
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};
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};
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&cps_sata0 {
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/* CPS Lane 1 - U32 */
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/* CPS Lane 3 - U31 */
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@ -164,6 +193,8 @@ &cps_sata0 {
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};
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&cps_spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cps_spi1_pins>;
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status = "okay";
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spi-flash@0 {
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