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clk: axi-clkgen: replace ARCH dependencies with driver deps 

The intent is to be able to run this driver to access the IP core in setups
where FPGA board is also connected via a PCIe bus. In such cases the number
of combinations explodes, where the host system can be an x86 with Xilinx
Zynq/ZynqMP/Microblaze board connected via PCIe.
Or even a ZynqMP board with a ZynqMP/Zynq/Microblaze connected via PCIe.

To accommodate for these cases, this change removes the limitation for this
driver to be compilable only on Zynq/Microblaze architectures.
And adds dependencies on the mechanisms required by the driver to work (OF
and HAS_IOMEM).

Signed-off-by: Dragos Bogdan <dragos.bogdan@analog.com>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20210201151245.21845-2-alexandru.ardelean@analog.com
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Alexandru Ardelean 2021-02-01 17:12:42 +02:00 committed by Stephen Boyd
parent 5c8fe583cc
commit 324a810583
1 changed files with 2 additions and 1 deletions
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3
drivers/clk/Kconfig
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@ -247,7 +247,8 @@ config CLK_TWL6040
config COMMON_CLK_AXI_CLKGEN
tristate "AXI clkgen driver"
depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
depends on HAS_IOMEM || COMPILE_TEST
depends on OF
help
Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
FPGAs. It is commonly used in Analog Devices' reference designs.