mirror of https://gitee.com/openkylin/linux.git
MIPS: Alchemy: get rid of common/reset.c
Implement reset / poweroff in the board code instead. The peripheral reset code is gone too since YAMON which all in-tree boards use does the same work when it boots. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/783/ Patchwork: http://patchwork.linux-mips.org/patch/882/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
Ralf Baechle
parent
325f8a0a31
commit
32fd6901a6
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@ -5,8 +5,7 @@
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# Makefile for the Alchemy Au1xx0 CPUs, generic files.
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#
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obj-y += prom.o time.o reset.o \
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clocks.o platform.o power.o setup.o \
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obj-y += prom.o time.o clocks.o platform.o power.o setup.o \
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sleeper.o dma.o dbdma.o
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obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += irq.o
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@ -1,185 +0,0 @@
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/*
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*
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* BRIEF MODULE DESCRIPTION
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* Au1xx0 reset routines.
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*
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* Copyright 2001, 2006, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/gpio.h>
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#include <asm/cacheflush.h>
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#include <asm/mach-au1x00/au1000.h>
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void au1000_restart(char *command)
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{
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/* Set all integrated peripherals to disabled states */
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extern void board_reset(void);
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u32 prid = read_c0_prid();
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printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
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switch (prid & 0xFF000000) {
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case 0x00000000: /* Au1000 */
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au_writel(0x02, 0xb0000010); /* ac97_enable */
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au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
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asm("sync");
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au_writel(0x00, 0xb017fffc); /* usbh_enable */
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au_writel(0x00, 0xb0200058); /* usbd_enable */
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au_writel(0x00, 0xb0300040); /* ir_enable */
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au_writel(0x00, 0xb4004104); /* mac dma */
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au_writel(0x00, 0xb4004114); /* mac dma */
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au_writel(0x00, 0xb4004124); /* mac dma */
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au_writel(0x00, 0xb4004134); /* mac dma */
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au_writel(0x00, 0xb0520000); /* macen0 */
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au_writel(0x00, 0xb0520004); /* macen1 */
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au_writel(0x00, 0xb1000008); /* i2s_enable */
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au_writel(0x00, 0xb1100100); /* uart0_enable */
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au_writel(0x00, 0xb1200100); /* uart1_enable */
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au_writel(0x00, 0xb1300100); /* uart2_enable */
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au_writel(0x00, 0xb1400100); /* uart3_enable */
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au_writel(0x02, 0xb1600100); /* ssi0_enable */
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au_writel(0x02, 0xb1680100); /* ssi1_enable */
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au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
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au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
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au_writel(0x00, 0xb1900028); /* sys_clksrc */
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au_writel(0x10, 0xb1900060); /* sys_cpupll */
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au_writel(0x00, 0xb1900064); /* sys_auxpll */
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au_writel(0x00, 0xb1900100); /* sys_pininputen */
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break;
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case 0x01000000: /* Au1500 */
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au_writel(0x02, 0xb0000010); /* ac97_enable */
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au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
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asm("sync");
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au_writel(0x00, 0xb017fffc); /* usbh_enable */
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au_writel(0x00, 0xb0200058); /* usbd_enable */
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au_writel(0x00, 0xb4004104); /* mac dma */
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au_writel(0x00, 0xb4004114); /* mac dma */
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au_writel(0x00, 0xb4004124); /* mac dma */
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au_writel(0x00, 0xb4004134); /* mac dma */
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au_writel(0x00, 0xb1520000); /* macen0 */
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au_writel(0x00, 0xb1520004); /* macen1 */
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au_writel(0x00, 0xb1100100); /* uart0_enable */
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au_writel(0x00, 0xb1400100); /* uart3_enable */
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au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
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au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
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au_writel(0x00, 0xb1900028); /* sys_clksrc */
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au_writel(0x10, 0xb1900060); /* sys_cpupll */
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au_writel(0x00, 0xb1900064); /* sys_auxpll */
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au_writel(0x00, 0xb1900100); /* sys_pininputen */
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break;
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case 0x02000000: /* Au1100 */
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au_writel(0x02, 0xb0000010); /* ac97_enable */
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au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
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asm("sync");
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au_writel(0x00, 0xb017fffc); /* usbh_enable */
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au_writel(0x00, 0xb0200058); /* usbd_enable */
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au_writel(0x00, 0xb0300040); /* ir_enable */
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au_writel(0x00, 0xb4004104); /* mac dma */
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au_writel(0x00, 0xb4004114); /* mac dma */
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au_writel(0x00, 0xb4004124); /* mac dma */
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au_writel(0x00, 0xb4004134); /* mac dma */
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au_writel(0x00, 0xb0520000); /* macen0 */
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au_writel(0x00, 0xb1000008); /* i2s_enable */
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au_writel(0x00, 0xb1100100); /* uart0_enable */
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au_writel(0x00, 0xb1200100); /* uart1_enable */
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au_writel(0x00, 0xb1400100); /* uart3_enable */
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au_writel(0x02, 0xb1600100); /* ssi0_enable */
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au_writel(0x02, 0xb1680100); /* ssi1_enable */
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au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
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au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
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au_writel(0x00, 0xb1900028); /* sys_clksrc */
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au_writel(0x10, 0xb1900060); /* sys_cpupll */
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au_writel(0x00, 0xb1900064); /* sys_auxpll */
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au_writel(0x00, 0xb1900100); /* sys_pininputen */
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break;
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case 0x03000000: /* Au1550 */
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au_writel(0x00, 0xb1a00004); /* psc 0 */
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au_writel(0x00, 0xb1b00004); /* psc 1 */
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au_writel(0x00, 0xb0a00004); /* psc 2 */
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au_writel(0x00, 0xb0b00004); /* psc 3 */
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au_writel(0x00, 0xb017fffc); /* usbh_enable */
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au_writel(0x00, 0xb0200058); /* usbd_enable */
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au_writel(0x00, 0xb4004104); /* mac dma */
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au_writel(0x00, 0xb4004114); /* mac dma */
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au_writel(0x00, 0xb4004124); /* mac dma */
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au_writel(0x00, 0xb4004134); /* mac dma */
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au_writel(0x00, 0xb1520000); /* macen0 */
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au_writel(0x00, 0xb1520004); /* macen1 */
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au_writel(0x00, 0xb1100100); /* uart0_enable */
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au_writel(0x00, 0xb1200100); /* uart1_enable */
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au_writel(0x00, 0xb1400100); /* uart3_enable */
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au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
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au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
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au_writel(0x00, 0xb1900028); /* sys_clksrc */
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au_writel(0x10, 0xb1900060); /* sys_cpupll */
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au_writel(0x00, 0xb1900064); /* sys_auxpll */
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au_writel(0x00, 0xb1900100); /* sys_pininputen */
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break;
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}
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set_c0_status(ST0_BEV | ST0_ERL);
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change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
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flush_cache_all();
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write_c0_wired(0);
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/* Give board a chance to do a hardware reset */
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board_reset();
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/* Jump to the beggining in case board_reset() is empty */
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__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
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}
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void au1000_halt(void)
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{
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#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
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/* Power off system */
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printk(KERN_NOTICE "\n** Powering off...\n");
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au_writew(au_readw(0xAF00001C) | (3 << 14), 0xAF00001C);
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au_sync();
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while (1); /* should not get here */
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#else
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printk(KERN_NOTICE "\n** You can safely turn off the power\n");
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#ifdef CONFIG_MIPS_MIRAGE
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gpio_direction_output(210, 1);
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#endif
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#ifdef CONFIG_PM
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au_sleep();
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/* Should not get here */
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printk(KERN_ERR "Unable to put CPU in sleep mode\n");
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while (1);
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#else
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while (1)
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__asm__(".set\tmips3\n\t"
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"wait\n\t"
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".set\tmips0");
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#endif
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#endif /* defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) */
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}
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void au1000_power_off(void)
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{
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au1000_halt();
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}
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@ -29,18 +29,13 @@
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#include <linux/ioport.h>
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#include <linux/jiffies.h>
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#include <linux/module.h>
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#include <linux/pm.h>
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#include <asm/mipsregs.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <au1000.h>
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extern void __init board_setup(void);
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extern void au1000_restart(char *);
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extern void au1000_halt(void);
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extern void au1000_power_off(void);
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extern void set_cpuspec(void);
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void __init plat_mem_setup(void)
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@ -57,10 +52,6 @@ void __init plat_mem_setup(void)
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/* this is faster than wasting cycles trying to approximate it */
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preset_lpj = (est_freq >> 1) / HZ;
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_machine_restart = au1000_restart;
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_machine_halt = au1000_halt;
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pm_power_off = au1000_power_off;
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board_setup(); /* board specific setup */
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if (au1xxx_cpu_needs_config_od())
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@ -9,30 +9,15 @@
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/pm.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include <asm/mach-db1x00/db1200.h>
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#include <asm/processor.h>
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#include <asm/reboot.h>
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const char *get_system_type(void)
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{
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return "Alchemy Db1200";
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}
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static void board_power_off(void)
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{
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bcsr_write(BCSR_RESETS, 0);
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bcsr_write(BCSR_SYSTEM, BCSR_SYSTEM_PWROFF | BCSR_SYSTEM_RESET);
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}
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void board_reset(void)
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{
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bcsr_write(BCSR_RESETS, 0);
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bcsr_write(BCSR_SYSTEM, 0);
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}
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void __init board_setup(void)
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{
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unsigned long freq0, clksrc, div, pfc;
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@ -73,10 +58,6 @@ void __init board_setup(void)
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clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
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__raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
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wmb();
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pm_power_off = board_power_off;
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_machine_halt = board_power_off;
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_machine_restart = (void(*)(char *))board_reset;
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}
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/* use the hexleds to count the number of times the cpu has entered
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@ -30,11 +30,13 @@
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/pm.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1xxx_eth.h>
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#include <asm/mach-db1x00/db1x00.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include <asm/reboot.h>
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#include <prom.h>
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@ -43,6 +45,18 @@ char irq_tab_alchemy[][5] __initdata = {
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[12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT371 */
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[13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */
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};
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static void bosporus_power_off(void)
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{
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printk(KERN_INFO "It's now safe to turn off power\n");
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while (1)
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asm volatile (".set mips3 ; wait ; .set mips0");
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}
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const char *get_system_type(void)
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{
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return "Alchemy Bosporus Gateway Reference";
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}
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#endif
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/*
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@ -73,6 +87,16 @@ char irq_tab_alchemy[][5] __initdata = {
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[12] = { -1, 0xff, 0xff, AU1500_PCI_INTC, 0xff }, /* IDSEL 12 - PNX1300 */
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[13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 13 - miniPCI */
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};
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static void mirage_power_off(void)
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{
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alchemy_gpio_direction_output(210, 1);
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}
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const char *get_system_type(void)
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{
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return "Alchemy Mirage";
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}
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#endif
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#ifdef CONFIG_MIPS_DB1550
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@ -83,19 +107,19 @@ char irq_tab_alchemy[][5] __initdata = {
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};
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#endif
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const char *get_system_type(void)
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#if defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE)
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static void mips_softreset(void)
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{
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#ifdef CONFIG_MIPS_BOSPORUS
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return "Alchemy Bosporus Gateway Reference";
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#else
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return "Alchemy Db1x00";
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#endif
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asm volatile ("jr\t%0" : : "r"(0xbfc00000));
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}
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void board_reset(void)
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#else
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const char *get_system_type(void)
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{
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bcsr_write(BCSR_SYSTEM, 0);
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return "Alchemy Db1x00";
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}
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#endif
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void __init board_setup(void)
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{
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@ -196,8 +220,17 @@ void __init board_setup(void)
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* be part of the audio driver.
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*/
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alchemy_gpio_direction_output(209, 1);
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pm_power_off = mirage_power_off;
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_machine_halt = mirage_power_off;
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_machine_restart = (void(*)(char *))mips_softreset;
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#endif
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#ifdef CONFIG_MIPS_BOSPORUS
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pm_power_off = bosporus_power_off;
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_machine_halt = bosporus_power_off;
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_machine_restart = (void(*)(char *))mips_softreset;
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#endif
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au_sync();
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}
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@ -8,6 +8,35 @@
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#include <linux/mtd/physmap.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <asm/reboot.h>
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#include <asm/mach-db1x00/bcsr.h>
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static void db1x_power_off(void)
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{
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bcsr_write(BCSR_RESETS, 0);
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bcsr_write(BCSR_SYSTEM, BCSR_SYSTEM_PWROFF | BCSR_SYSTEM_RESET);
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}
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static void db1x_reset(char *c)
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{
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bcsr_write(BCSR_RESETS, 0);
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bcsr_write(BCSR_SYSTEM, 0);
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}
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static int __init db1x_poweroff_setup(void)
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{
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if (!pm_power_off)
|
||||
pm_power_off = db1x_power_off;
|
||||
if (!_machine_halt)
|
||||
_machine_halt = db1x_power_off;
|
||||
if (!_machine_restart)
|
||||
_machine_restart = db1x_reset;
|
||||
|
||||
return 0;
|
||||
}
|
||||
late_initcall(db1x_poweroff_setup);
|
||||
|
||||
/* register a pcmcia socket */
|
||||
int __init db1x_register_pcmcia_socket(unsigned long pseudo_attr_start,
|
||||
|
|
|
|||
|
|
@ -31,7 +31,9 @@
|
|||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/pm.h>
|
||||
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
|
||||
#include <prom.h>
|
||||
|
|
@ -50,12 +52,19 @@ char irq_tab_alchemy[][5] __initdata = {
|
|||
extern int (*board_pci_idsel)(unsigned int devsel, int assert);
|
||||
int mtx1_pci_idsel(unsigned int devsel, int assert);
|
||||
|
||||
void board_reset(void)
|
||||
static void mtx1_reset(char *c)
|
||||
{
|
||||
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
|
||||
au_writel(0x00000000, 0xAE00001C);
|
||||
}
|
||||
|
||||
static void mtx1_power_off(void)
|
||||
{
|
||||
printk(KERN_ALERT "It's now safe to remove power\n");
|
||||
while (1)
|
||||
asm volatile (".set mips3 ; wait ; .set mips1");
|
||||
}
|
||||
|
||||
void __init board_setup(void)
|
||||
{
|
||||
#ifdef CONFIG_SERIAL_8250_CONSOLE
|
||||
|
|
@ -98,6 +107,10 @@ void __init board_setup(void)
|
|||
alchemy_gpio_direction_output(211, 1); /* green on */
|
||||
alchemy_gpio_direction_output(212, 0); /* red off */
|
||||
|
||||
pm_power_off = mtx1_power_off;
|
||||
_machine_halt = mtx1_power_off;
|
||||
_machine_restart = mtx1_reset;
|
||||
|
||||
printk(KERN_INFO "4G Systems MTX-1 Board\n");
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -27,17 +27,26 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/pm.h>
|
||||
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
|
||||
#include <prom.h>
|
||||
|
||||
void board_reset(void)
|
||||
static void xxs1500_reset(char *c)
|
||||
{
|
||||
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
|
||||
au_writel(0x00000000, 0xAE00001C);
|
||||
}
|
||||
|
||||
static void xxs1500_power_off(void)
|
||||
{
|
||||
printk(KERN_ALERT "It's now safe to remove power\n");
|
||||
while (1)
|
||||
asm volatile (".set mips3 ; wait ; .set mips1");
|
||||
}
|
||||
|
||||
void __init board_setup(void)
|
||||
{
|
||||
u32 pin_func;
|
||||
|
|
@ -52,6 +61,10 @@ void __init board_setup(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
pm_power_off = xxs1500_power_off;
|
||||
_machine_halt = xxs1500_power_off;
|
||||
_machine_restart = xxs1500_reset;
|
||||
|
||||
alchemy_gpio1_input_enable();
|
||||
alchemy_gpio2_enable();
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue