mirror of https://gitee.com/openkylin/linux.git
perf: Per PMU disable
Changes perf_disable() into perf_pmu_disable(). Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: paulus <paulus@samba.org> Cc: stephane eranian <eranian@googlemail.com> Cc: Robert Richter <robert.richter@amd.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Cyrill Gorcunov <gorcunov@gmail.com> Cc: Lin Ming <ming.m.lin@intel.com> Cc: Yanmin <yanmin_zhang@linux.intel.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> Cc: David Miller <davem@davemloft.net> Cc: Michael Cree <mcree@orcon.net.nz> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Peter Zijlstra
Ingo Molnar
parent
24cd7f54a0
commit
33696fc0d1
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@ -435,7 +435,7 @@ static int alpha_pmu_enable(struct perf_event *event)
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* nevertheless we disable the PMCs first to enable a potential
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* final PMI to occur before we disable interrupts.
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*/
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perf_disable();
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perf_pmu_disable(event->pmu);
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local_irq_save(flags);
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/* Default to error to be returned */
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@ -456,7 +456,7 @@ static int alpha_pmu_enable(struct perf_event *event)
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}
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local_irq_restore(flags);
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perf_enable();
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perf_pmu_enable(event->pmu);
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return ret;
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}
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@ -474,7 +474,7 @@ static void alpha_pmu_disable(struct perf_event *event)
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unsigned long flags;
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int j;
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perf_disable();
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perf_pmu_disable(event->pmu);
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local_irq_save(flags);
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for (j = 0; j < cpuc->n_events; j++) {
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@ -502,7 +502,7 @@ static void alpha_pmu_disable(struct perf_event *event)
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}
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local_irq_restore(flags);
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perf_enable();
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perf_pmu_enable(event->pmu);
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}
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@ -668,18 +668,10 @@ static int alpha_pmu_event_init(struct perf_event *event)
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return err;
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}
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static struct pmu pmu = {
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.event_init = alpha_pmu_event_init,
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.enable = alpha_pmu_enable,
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.disable = alpha_pmu_disable,
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.read = alpha_pmu_read,
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.unthrottle = alpha_pmu_unthrottle,
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};
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/*
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* Main entry point - enable HW performance counters.
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*/
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void hw_perf_enable(void)
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static void alpha_pmu_pmu_enable(struct pmu *pmu)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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@ -705,7 +697,7 @@ void hw_perf_enable(void)
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* Main entry point - disable HW performance counters.
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*/
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void hw_perf_disable(void)
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static void alpha_pmu_pmu_disable(struct pmu *pmu)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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@ -718,6 +710,16 @@ void hw_perf_disable(void)
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wrperfmon(PERFMON_CMD_DISABLE, cpuc->idx_mask);
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}
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static struct pmu pmu = {
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.pmu_enable = alpha_pmu_pmu_enable,
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.pmu_disable = alpha_pmu_pmu_disable,
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.event_init = alpha_pmu_event_init,
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.enable = alpha_pmu_enable,
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.disable = alpha_pmu_disable,
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.read = alpha_pmu_read,
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.unthrottle = alpha_pmu_unthrottle,
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};
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/*
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* Main entry point - don't know when this is called but it
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@ -277,7 +277,7 @@ armpmu_enable(struct perf_event *event)
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int idx;
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int err = 0;
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perf_disable();
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perf_pmu_disable(event->pmu);
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/* If we don't have a space for the counter then finish early. */
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idx = armpmu->get_event_idx(cpuc, hwc);
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@ -305,7 +305,7 @@ armpmu_enable(struct perf_event *event)
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perf_event_update_userpage(event);
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out:
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perf_enable();
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perf_pmu_enable(event->pmu);
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return err;
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}
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@ -534,16 +534,7 @@ static int armpmu_event_init(struct perf_event *event)
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return err;
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}
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static struct pmu pmu = {
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.event_init = armpmu_event_init,
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.enable = armpmu_enable,
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.disable = armpmu_disable,
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.unthrottle = armpmu_unthrottle,
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.read = armpmu_read,
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};
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void
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hw_perf_enable(void)
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static void armpmu_pmu_enable(struct pmu *pmu)
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{
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/* Enable all of the perf events on hardware. */
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int idx;
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@ -564,13 +555,22 @@ hw_perf_enable(void)
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armpmu->start();
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}
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void
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hw_perf_disable(void)
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static void armpmu_pmu_disable(struct pmu *pmu)
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{
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if (armpmu)
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armpmu->stop();
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}
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static struct pmu pmu = {
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.pmu_enable = armpmu_pmu_enable,
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.pmu_disable= armpmu_pmu_disable,
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.event_init = armpmu_event_init,
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.enable = armpmu_enable,
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.disable = armpmu_disable,
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.unthrottle = armpmu_unthrottle,
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.read = armpmu_read,
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};
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/*
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* ARMv6 Performance counter handling code.
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*
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@ -517,7 +517,7 @@ static void write_mmcr0(struct cpu_hw_events *cpuhw, unsigned long mmcr0)
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* Disable all events to prevent PMU interrupts and to allow
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* events to be added or removed.
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*/
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void hw_perf_disable(void)
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static void power_pmu_pmu_disable(struct pmu *pmu)
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{
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struct cpu_hw_events *cpuhw;
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unsigned long flags;
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@ -565,7 +565,7 @@ void hw_perf_disable(void)
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* If we were previously disabled and events were added, then
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* put the new config on the PMU.
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*/
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void hw_perf_enable(void)
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static void power_pmu_pmu_enable(struct pmu *pmu)
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{
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struct perf_event *event;
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struct cpu_hw_events *cpuhw;
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@ -735,7 +735,7 @@ static int power_pmu_enable(struct perf_event *event)
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int ret = -EAGAIN;
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local_irq_save(flags);
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perf_disable();
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perf_pmu_disable(event->pmu);
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/*
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* Add the event to the list (if there is room)
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@ -769,7 +769,7 @@ static int power_pmu_enable(struct perf_event *event)
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ret = 0;
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out:
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perf_enable();
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perf_pmu_enable(event->pmu);
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local_irq_restore(flags);
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return ret;
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}
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@ -784,7 +784,7 @@ static void power_pmu_disable(struct perf_event *event)
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unsigned long flags;
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local_irq_save(flags);
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perf_disable();
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perf_pmu_disable(event->pmu);
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power_pmu_read(event);
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@ -821,7 +821,7 @@ static void power_pmu_disable(struct perf_event *event)
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cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE);
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}
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perf_enable();
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perf_pmu_enable(event->pmu);
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local_irq_restore(flags);
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}
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@ -837,7 +837,7 @@ static void power_pmu_unthrottle(struct perf_event *event)
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if (!event->hw.idx || !event->hw.sample_period)
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return;
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local_irq_save(flags);
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perf_disable();
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perf_pmu_disable(event->pmu);
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power_pmu_read(event);
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left = event->hw.sample_period;
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event->hw.last_period = left;
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@ -848,7 +848,7 @@ static void power_pmu_unthrottle(struct perf_event *event)
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local64_set(&event->hw.prev_count, val);
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local64_set(&event->hw.period_left, left);
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perf_event_update_userpage(event);
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perf_enable();
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perf_pmu_enable(event->pmu);
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local_irq_restore(flags);
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}
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@ -861,7 +861,7 @@ void power_pmu_start_txn(struct pmu *pmu)
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{
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struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
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perf_disable();
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perf_pmu_disable(pmu);
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cpuhw->group_flag |= PERF_EVENT_TXN;
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cpuhw->n_txn_start = cpuhw->n_events;
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}
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@ -876,7 +876,7 @@ void power_pmu_cancel_txn(struct pmu *pmu)
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struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
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cpuhw->group_flag &= ~PERF_EVENT_TXN;
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perf_enable();
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perf_pmu_enable(pmu);
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}
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/*
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@ -903,7 +903,7 @@ int power_pmu_commit_txn(struct pmu *pmu)
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cpuhw->event[i]->hw.config = cpuhw->events[i];
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cpuhw->group_flag &= ~PERF_EVENT_TXN;
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perf_enable();
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perf_pmu_enable(pmu);
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return 0;
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}
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@ -1131,6 +1131,8 @@ static int power_pmu_event_init(struct perf_event *event)
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}
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struct pmu power_pmu = {
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.pmu_enable = power_pmu_pmu_enable,
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.pmu_disable = power_pmu_pmu_disable,
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.event_init = power_pmu_event_init,
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.enable = power_pmu_enable,
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.disable = power_pmu_disable,
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@ -177,7 +177,7 @@ static void fsl_emb_pmu_read(struct perf_event *event)
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* Disable all events to prevent PMU interrupts and to allow
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* events to be added or removed.
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*/
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void hw_perf_disable(void)
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static void fsl_emb_pmu_pmu_disable(struct pmu *pmu)
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{
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struct cpu_hw_events *cpuhw;
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unsigned long flags;
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@ -216,7 +216,7 @@ void hw_perf_disable(void)
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* If we were previously disabled and events were added, then
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* put the new config on the PMU.
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*/
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void hw_perf_enable(void)
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static void fsl_emb_pmu_pmu_enable(struct pmu *pmu)
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{
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struct cpu_hw_events *cpuhw;
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unsigned long flags;
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@ -271,7 +271,7 @@ static int fsl_emb_pmu_enable(struct perf_event *event)
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u64 val;
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int i;
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perf_disable();
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perf_pmu_disable(event->pmu);
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cpuhw = &get_cpu_var(cpu_hw_events);
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if (event->hw.config & FSL_EMB_EVENT_RESTRICTED)
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@ -311,7 +311,7 @@ static int fsl_emb_pmu_enable(struct perf_event *event)
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ret = 0;
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out:
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put_cpu_var(cpu_hw_events);
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perf_enable();
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perf_pmu_enable(event->pmu);
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return ret;
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}
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@ -321,7 +321,7 @@ static void fsl_emb_pmu_disable(struct perf_event *event)
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struct cpu_hw_events *cpuhw;
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int i = event->hw.idx;
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perf_disable();
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perf_pmu_disable(event->pmu);
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if (i < 0)
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goto out;
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@ -349,7 +349,7 @@ static void fsl_emb_pmu_disable(struct perf_event *event)
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cpuhw->n_events--;
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out:
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perf_enable();
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perf_pmu_enable(event->pmu);
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put_cpu_var(cpu_hw_events);
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}
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@ -367,7 +367,7 @@ static void fsl_emb_pmu_unthrottle(struct perf_event *event)
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if (event->hw.idx < 0 || !event->hw.sample_period)
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return;
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local_irq_save(flags);
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perf_disable();
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perf_pmu_disable(event->pmu);
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fsl_emb_pmu_read(event);
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left = event->hw.sample_period;
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event->hw.last_period = left;
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@ -378,7 +378,7 @@ static void fsl_emb_pmu_unthrottle(struct perf_event *event)
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local64_set(&event->hw.prev_count, val);
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local64_set(&event->hw.period_left, left);
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perf_event_update_userpage(event);
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perf_enable();
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perf_pmu_enable(event->pmu);
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local_irq_restore(flags);
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}
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@ -524,6 +524,8 @@ static int fsl_emb_pmu_event_init(struct perf_event *event)
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}
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static struct pmu fsl_emb_pmu = {
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.pmu_enable = fsl_emb_pmu_pmu_enable,
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.pmu_disable = fsl_emb_pmu_pmu_disable,
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.event_init = fsl_emb_pmu_event_init,
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.enable = fsl_emb_pmu_enable,
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.disable = fsl_emb_pmu_disable,
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@ -232,7 +232,7 @@ static int sh_pmu_enable(struct perf_event *event)
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int idx = hwc->idx;
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int ret = -EAGAIN;
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perf_disable();
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perf_pmu_disable(event->pmu);
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if (test_and_set_bit(idx, cpuc->used_mask)) {
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idx = find_first_zero_bit(cpuc->used_mask, sh_pmu->num_events);
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@ -253,7 +253,7 @@ static int sh_pmu_enable(struct perf_event *event)
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perf_event_update_userpage(event);
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ret = 0;
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out:
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perf_enable();
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perf_pmu_enable(event->pmu);
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return ret;
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}
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@ -285,7 +285,25 @@ static int sh_pmu_event_init(struct perf_event *event)
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return err;
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}
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static void sh_pmu_pmu_enable(struct pmu *pmu)
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{
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if (!sh_pmu_initialized())
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return;
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sh_pmu->enable_all();
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}
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static void sh_pmu_pmu_disable(struct pmu *pmu)
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{
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if (!sh_pmu_initialized())
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return;
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sh_pmu->disable_all();
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}
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static struct pmu pmu = {
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.pmu_enable = sh_pmu_pmu_enable,
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.pmu_disable = sh_pmu_pmu_disable,
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.event_init = sh_pmu_event_init,
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.enable = sh_pmu_enable,
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.disable = sh_pmu_disable,
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@ -316,22 +334,6 @@ sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
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return NOTIFY_OK;
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}
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void hw_perf_enable(void)
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{
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if (!sh_pmu_initialized())
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return;
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sh_pmu->enable_all();
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}
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void hw_perf_disable(void)
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{
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if (!sh_pmu_initialized())
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return;
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sh_pmu->disable_all();
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}
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int __cpuinit register_sh_pmu(struct sh_pmu *pmu)
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{
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if (sh_pmu)
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@ -664,7 +664,7 @@ static u64 maybe_change_configuration(struct cpu_hw_events *cpuc, u64 pcr)
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return pcr;
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}
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void hw_perf_enable(void)
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static void sparc_pmu_pmu_enable(struct pmu *pmu)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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u64 pcr;
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@ -691,7 +691,7 @@ void hw_perf_enable(void)
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pcr_ops->write(cpuc->pcr);
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}
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void hw_perf_disable(void)
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static void sparc_pmu_pmu_disable(struct pmu *pmu)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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u64 val;
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@ -718,7 +718,7 @@ static void sparc_pmu_disable(struct perf_event *event)
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int i;
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local_irq_save(flags);
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perf_disable();
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perf_pmu_disable(event->pmu);
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for (i = 0; i < cpuc->n_events; i++) {
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if (event == cpuc->event[i]) {
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@ -748,7 +748,7 @@ static void sparc_pmu_disable(struct perf_event *event)
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}
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}
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perf_enable();
|
||||
perf_pmu_enable(event->pmu);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
|
@ -991,7 +991,7 @@ static int sparc_pmu_enable(struct perf_event *event)
|
|||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
perf_disable();
|
||||
perf_pmu_disable(event->pmu);
|
||||
|
||||
n0 = cpuc->n_events;
|
||||
if (n0 >= perf_max_events)
|
||||
|
|
@ -1020,7 +1020,7 @@ static int sparc_pmu_enable(struct perf_event *event)
|
|||
|
||||
ret = 0;
|
||||
out:
|
||||
perf_enable();
|
||||
perf_pmu_enable(event->pmu);
|
||||
local_irq_restore(flags);
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -1113,7 +1113,7 @@ static void sparc_pmu_start_txn(struct pmu *pmu)
|
|||
{
|
||||
struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
|
||||
perf_disable();
|
||||
perf_pmu_disable(pmu);
|
||||
cpuhw->group_flag |= PERF_EVENT_TXN;
|
||||
}
|
||||
|
||||
|
|
@ -1127,7 +1127,7 @@ static void sparc_pmu_cancel_txn(struct pmu *pmu)
|
|||
struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
|
||||
cpuhw->group_flag &= ~PERF_EVENT_TXN;
|
||||
perf_enable();
|
||||
perf_pmu_enable(pmu);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -1151,11 +1151,13 @@ static int sparc_pmu_commit_txn(struct pmu *pmu)
|
|||
return -EAGAIN;
|
||||
|
||||
cpuc->group_flag &= ~PERF_EVENT_TXN;
|
||||
perf_enable();
|
||||
perf_pmu_enable(pmu);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct pmu pmu = {
|
||||
.pmu_enable = sparc_pmu_pmu_enable,
|
||||
.pmu_disable = sparc_pmu_pmu_disable,
|
||||
.event_init = sparc_pmu_event_init,
|
||||
.enable = sparc_pmu_enable,
|
||||
.disable = sparc_pmu_disable,
|
||||
|
|
|
|||
|
|
@ -583,7 +583,7 @@ static void x86_pmu_disable_all(void)
|
|||
}
|
||||
}
|
||||
|
||||
void hw_perf_disable(void)
|
||||
static void x86_pmu_pmu_disable(struct pmu *pmu)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
|
||||
|
|
@ -803,7 +803,7 @@ static inline int match_prev_assignment(struct hw_perf_event *hwc,
|
|||
static int x86_pmu_start(struct perf_event *event);
|
||||
static void x86_pmu_stop(struct perf_event *event);
|
||||
|
||||
void hw_perf_enable(void)
|
||||
static void x86_pmu_pmu_enable(struct pmu *pmu)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
struct perf_event *event;
|
||||
|
|
@ -969,7 +969,7 @@ static int x86_pmu_enable(struct perf_event *event)
|
|||
|
||||
hwc = &event->hw;
|
||||
|
||||
perf_disable();
|
||||
perf_pmu_disable(event->pmu);
|
||||
n0 = cpuc->n_events;
|
||||
ret = n = collect_events(cpuc, event, false);
|
||||
if (ret < 0)
|
||||
|
|
@ -999,7 +999,7 @@ static int x86_pmu_enable(struct perf_event *event)
|
|||
|
||||
ret = 0;
|
||||
out:
|
||||
perf_enable();
|
||||
perf_pmu_enable(event->pmu);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -1436,7 +1436,7 @@ static void x86_pmu_start_txn(struct pmu *pmu)
|
|||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
|
||||
perf_disable();
|
||||
perf_pmu_disable(pmu);
|
||||
cpuc->group_flag |= PERF_EVENT_TXN;
|
||||
cpuc->n_txn = 0;
|
||||
}
|
||||
|
|
@ -1456,7 +1456,7 @@ static void x86_pmu_cancel_txn(struct pmu *pmu)
|
|||
*/
|
||||
cpuc->n_added -= cpuc->n_txn;
|
||||
cpuc->n_events -= cpuc->n_txn;
|
||||
perf_enable();
|
||||
perf_pmu_enable(pmu);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -1486,7 +1486,7 @@ static int x86_pmu_commit_txn(struct pmu *pmu)
|
|||
memcpy(cpuc->assign, assign, n*sizeof(int));
|
||||
|
||||
cpuc->group_flag &= ~PERF_EVENT_TXN;
|
||||
perf_enable();
|
||||
perf_pmu_enable(pmu);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1605,6 +1605,8 @@ int x86_pmu_event_init(struct perf_event *event)
|
|||
}
|
||||
|
||||
static struct pmu pmu = {
|
||||
.pmu_enable = x86_pmu_pmu_enable,
|
||||
.pmu_disable = x86_pmu_pmu_disable,
|
||||
.event_init = x86_pmu_event_init,
|
||||
.enable = x86_pmu_enable,
|
||||
.disable = x86_pmu_disable,
|
||||
|
|
|
|||
|
|
@ -563,6 +563,11 @@ struct perf_event;
|
|||
struct pmu {
|
||||
struct list_head entry;
|
||||
|
||||
int *pmu_disable_count;
|
||||
|
||||
void (*pmu_enable) (struct pmu *pmu);
|
||||
void (*pmu_disable) (struct pmu *pmu);
|
||||
|
||||
/*
|
||||
* Should return -ENOENT when the @event doesn't match this PMU.
|
||||
*/
|
||||
|
|
@ -868,10 +873,8 @@ extern void perf_event_free_task(struct task_struct *task);
|
|||
extern void set_perf_event_pending(void);
|
||||
extern void perf_event_do_pending(void);
|
||||
extern void perf_event_print_debug(void);
|
||||
extern void __perf_disable(void);
|
||||
extern bool __perf_enable(void);
|
||||
extern void perf_disable(void);
|
||||
extern void perf_enable(void);
|
||||
extern void perf_pmu_disable(struct pmu *pmu);
|
||||
extern void perf_pmu_enable(struct pmu *pmu);
|
||||
extern int perf_event_task_disable(void);
|
||||
extern int perf_event_task_enable(void);
|
||||
extern void perf_event_update_userpage(struct perf_event *event);
|
||||
|
|
@ -1056,8 +1059,6 @@ static inline void perf_event_exit_task(struct task_struct *child) { }
|
|||
static inline void perf_event_free_task(struct task_struct *task) { }
|
||||
static inline void perf_event_do_pending(void) { }
|
||||
static inline void perf_event_print_debug(void) { }
|
||||
static inline void perf_disable(void) { }
|
||||
static inline void perf_enable(void) { }
|
||||
static inline int perf_event_task_disable(void) { return -EINVAL; }
|
||||
static inline int perf_event_task_enable(void) { return -EINVAL; }
|
||||
|
||||
|
|
|
|||
|
|
@ -71,23 +71,20 @@ static atomic64_t perf_event_id;
|
|||
*/
|
||||
static DEFINE_SPINLOCK(perf_resource_lock);
|
||||
|
||||
void __weak hw_perf_disable(void) { barrier(); }
|
||||
void __weak hw_perf_enable(void) { barrier(); }
|
||||
|
||||
void __weak perf_event_print_debug(void) { }
|
||||
|
||||
static DEFINE_PER_CPU(int, perf_disable_count);
|
||||
|
||||
void perf_disable(void)
|
||||
void perf_pmu_disable(struct pmu *pmu)
|
||||
{
|
||||
if (!__get_cpu_var(perf_disable_count)++)
|
||||
hw_perf_disable();
|
||||
int *count = this_cpu_ptr(pmu->pmu_disable_count);
|
||||
if (!(*count)++)
|
||||
pmu->pmu_disable(pmu);
|
||||
}
|
||||
|
||||
void perf_enable(void)
|
||||
void perf_pmu_enable(struct pmu *pmu)
|
||||
{
|
||||
if (!--__get_cpu_var(perf_disable_count))
|
||||
hw_perf_enable();
|
||||
int *count = this_cpu_ptr(pmu->pmu_disable_count);
|
||||
if (!--(*count))
|
||||
pmu->pmu_enable(pmu);
|
||||
}
|
||||
|
||||
static void get_ctx(struct perf_event_context *ctx)
|
||||
|
|
@ -4970,11 +4967,19 @@ static struct srcu_struct pmus_srcu;
|
|||
|
||||
int perf_pmu_register(struct pmu *pmu)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&pmus_lock);
|
||||
ret = -ENOMEM;
|
||||
pmu->pmu_disable_count = alloc_percpu(int);
|
||||
if (!pmu->pmu_disable_count)
|
||||
goto unlock;
|
||||
list_add_rcu(&pmu->entry, &pmus);
|
||||
ret = 0;
|
||||
unlock:
|
||||
mutex_unlock(&pmus_lock);
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
void perf_pmu_unregister(struct pmu *pmu)
|
||||
|
|
@ -4984,6 +4989,8 @@ void perf_pmu_unregister(struct pmu *pmu)
|
|||
mutex_unlock(&pmus_lock);
|
||||
|
||||
synchronize_srcu(&pmus_srcu);
|
||||
|
||||
free_percpu(pmu->pmu_disable_count);
|
||||
}
|
||||
|
||||
struct pmu *perf_init_event(struct perf_event *event)
|
||||
|
|
|
|||
Loading…
Reference in New Issue