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coresight: etm4x: Check for Software Lock 

The Software lock is not implemented for system instructions
based accesses. So, skip the lock register access in such
cases.

Link: https://lore.kernel.org/r/20210110224850.1880240-15-suzuki.poulose@arm.com
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-17-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Suzuki K Poulose 2021-02-01 11:13:36 -07:00 committed by Greg Kroah-Hartman
parent d02dfac343
commit 33d5573a15
1 changed files with 26 additions and 14 deletions
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40
drivers/hwtracing/coresight/coresight-etm4x-core.c
View File

@ -133,6 +133,21 @@ static void etm4_os_lock(struct etmv4_drvdata *drvdata)
isb();
}
static void etm4_cs_lock(struct etmv4_drvdata *drvdata,
struct csdev_access *csa)
{
/* Software Lock is only accessible via memory mapped interface */
if (csa->io_mem)
CS_LOCK(csa->base);
}
static void etm4_cs_unlock(struct etmv4_drvdata *drvdata,
struct csdev_access *csa)
{
if (csa->io_mem)
CS_UNLOCK(csa->base);
}
static bool etm4_arch_supported(u8 arch)
{
/* Mask out the minor version number */
@ -263,7 +278,8 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
struct device *etm_dev = &csdev->dev;
struct csdev_access *csa = &csdev->access;
CS_UNLOCK(drvdata->base);
etm4_cs_unlock(drvdata, csa);
etm4_enable_arch_specific(drvdata);
etm4_os_unlock(drvdata);
@ -366,7 +382,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
isb();
done:
CS_LOCK(drvdata->base);
etm4_cs_lock(drvdata, csa);
dev_dbg(etm_dev, "cpu: %d enable smp call done: %d\n",
drvdata->cpu, rc);
@ -623,7 +639,7 @@ static void etm4_disable_hw(void *info)
struct csdev_access *csa = &csdev->access;
int i;
CS_UNLOCK(drvdata->base);
etm4_cs_unlock(drvdata, csa);
etm4_disable_arch_specific(drvdata);
if (!drvdata->skip_power_up) {
@ -665,8 +681,7 @@ static void etm4_disable_hw(void *info)
}
coresight_disclaim_device_unlocked(csdev);
CS_LOCK(drvdata->base);
etm4_cs_lock(drvdata, csa);
dev_dbg(&drvdata->csdev->dev,
"cpu: %d disable smp call done\n", drvdata->cpu);
@ -776,8 +791,7 @@ static void etm4_init_arch_data(void *info)
/* Make sure all registers are accessible */
etm4_os_unlock_csa(drvdata, csa);
CS_UNLOCK(drvdata->base);
etm4_cs_unlock(drvdata, csa);
/* find all capabilities of the tracing unit */
etmidr0 = etm4x_relaxed_read32(csa, TRCIDR0);
@ -942,7 +956,7 @@ static void etm4_init_arch_data(void *info)
drvdata->nrseqstate = BMVAL(etmidr5, 25, 27);
/* NUMCNTR, bits[30:28] number of counters available for tracing */
drvdata->nr_cntr = BMVAL(etmidr5, 28, 30);
CS_LOCK(drvdata->base);
etm4_cs_lock(drvdata, csa);
}
/* Set ELx trace filter access in the TRCVICTLR register */
@ -1323,8 +1337,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
dsb(sy);
isb();
CS_UNLOCK(drvdata->base);
etm4_cs_unlock(drvdata, csa);
/* Lock the OS lock to disable trace and external debugger access */
etm4_os_lock(drvdata);
@ -1437,7 +1450,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
etm4x_relaxed_write32(csa, (state->trcpdcr & ~TRCPDCR_PU),
TRCPDCR);
out:
CS_LOCK(drvdata->base);
etm4_cs_lock(drvdata, csa);
return ret;
}
@ -1448,8 +1461,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)
struct csdev_access tmp_csa = CSDEV_ACCESS_IOMEM(drvdata->base);
struct csdev_access *csa = &tmp_csa;
CS_UNLOCK(drvdata->base);
etm4_cs_unlock(drvdata, csa);
etm4x_relaxed_write32(csa, state->trcclaimset, TRCCLAIMSET);
etm4x_relaxed_write32(csa, state->trcprgctlr, TRCPRGCTLR);
@ -1534,7 +1546,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)
/* Unlock the OS lock to re-enable trace and external debug access */
etm4_os_unlock(drvdata);
CS_LOCK(drvdata->base);
etm4_cs_lock(drvdata, csa);
}
static int etm4_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd,