mirror of https://gitee.com/openkylin/linux.git
usb: phy: qcom: New APQ8016/MSM8916 USB transceiver driver
Driver handles PHY initialization, clock management, power management and workarounds required after resetting the hardware. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Ivan T. Ivanov
Felipe Balbi
parent
75ddead2a7
commit
351169933e
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@ -0,0 +1,76 @@
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Qualcomm's APQ8016/MSM8916 USB transceiver controller
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- compatible:
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Usage: required
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Value type: <string>
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Definition: Should contain "qcom,usb-8x16-phy".
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: USB PHY base address and length of the register map
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- clocks:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: See clock-bindings.txt section "consumers". List of
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two clock specifiers for interface and core controller
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clocks.
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- clock-names:
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Usage: required
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Value type: <string>
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Definition: Must contain "iface" and "core" strings.
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- vddcx-supply:
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Usage: required
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Value type: <phandle>
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Definition: phandle to the regulator VDCCX supply node.
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- v1p8-supply:
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Usage: required
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Value type: <phandle>
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Definition: phandle to the regulator 1.8V supply node.
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- v3p3-supply:
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Usage: required
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Value type: <phandle>
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Definition: phandle to the regulator 3.3V supply node.
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- resets:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: See reset.txt section "consumers". PHY reset specifier.
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- reset-names:
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Usage: required
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Value type: <string>
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Definition: Must contain "phy" string.
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- switch-gpio:
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Some boards are using Dual SPDT USB Switch, witch is
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controlled by GPIO to de/multiplex D+/D- USB lines
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between connectors.
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Example:
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usb_phy: phy@78d9000 {
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compatible = "qcom,usb-8x16-phy";
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reg = <0x78d9000 0x400>;
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vddcx-supply = <&pm8916_s1_corner>;
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v1p8-supply = <&pm8916_l7>;
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v3p3-supply = <&pm8916_l13>;
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clocks = <&gcc GCC_USB_HS_AHB_CLK>,
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<&gcc GCC_USB_HS_SYSTEM_CLK>;
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clock-names = "iface", "core";
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resets = <&gcc GCC_USB2A_PHY_BCR>;
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reset-names = "phy";
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// D+/D- lines: 1 - Routed to HUB, 0 - Device connector
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switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
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};
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@ -152,6 +152,20 @@ config USB_MSM_OTG
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This driver is not supported on boards like trout which
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has an external PHY.
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config USB_QCOM_8X16_PHY
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tristate "Qualcomm APQ8016/MSM8916 on-chip USB PHY controller support"
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depends on ARCH_QCOM || COMPILE_TEST
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depends on RESET_CONTROLLER
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select USB_PHY
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select USB_ULPI_VIEWPORT
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help
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Enable this to support the USB transceiver on Qualcomm 8x16 chipsets.
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It handles PHY initialization, clock management, power management,
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and workarounds required after resetting the hardware.
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To compile this driver as a module, choose M here: the
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module will be called phy-qcom-8x16-usb.
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config USB_MV_OTG
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tristate "Marvell USB OTG support"
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depends on USB_EHCI_MV && USB_MV_UDC && PM
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@ -20,6 +20,7 @@ obj-$(CONFIG_USB_EHCI_TEGRA) += phy-tegra-usb.o
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obj-$(CONFIG_USB_GPIO_VBUS) += phy-gpio-vbus-usb.o
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obj-$(CONFIG_USB_ISP1301) += phy-isp1301.o
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obj-$(CONFIG_USB_MSM_OTG) += phy-msm-usb.o
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obj-$(CONFIG_USB_QCOM_8X16_PHY) += phy-qcom-8x16-usb.o
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obj-$(CONFIG_USB_MV_OTG) += phy-mv-usb.o
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obj-$(CONFIG_USB_MXS_PHY) += phy-mxs-usb.o
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obj-$(CONFIG_USB_RCAR_PHY) += phy-rcar-usb.o
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@ -0,0 +1,436 @@
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/*
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* Copyright (c) 2015, Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/extcon.h>
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#include <linux/gpio/consumer.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reboot.h>
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#include <linux/slab.h>
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#include <linux/usb.h>
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#include <linux/usb/ulpi.h>
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#define HSPHY_AHBBURST 0x0090
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#define HSPHY_AHBMODE 0x0098
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#define HSPHY_GENCONFIG 0x009c
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#define HSPHY_GENCONFIG_2 0x00a0
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#define HSPHY_USBCMD 0x0140
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#define HSPHY_ULPI_VIEWPORT 0x0170
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#define HSPHY_CTRL 0x0240
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#define HSPHY_TXFIFO_IDLE_FORCE_DIS BIT(4)
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#define HSPHY_SESS_VLD_CTRL_EN BIT(7)
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#define HSPHY_POR_ASSERT BIT(0)
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#define HSPHY_RETEN BIT(1)
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#define HSPHY_SESS_VLD_CTRL BIT(25)
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#define ULPI_PWR_CLK_MNG_REG 0x88
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#define ULPI_PWR_OTG_COMP_DISABLE BIT(0)
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#define ULPI_MISC_A 0x96
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#define ULPI_MISC_A_VBUSVLDEXTSEL BIT(1)
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#define ULPI_MISC_A_VBUSVLDEXT BIT(0)
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#define HSPHY_3P3_MIN 3050000 /* uV */
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#define HSPHY_3P3_MAX 3300000 /* uV */
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#define HSPHY_1P8_MIN 1800000 /* uV */
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#define HSPHY_1P8_MAX 1800000 /* uV */
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#define HSPHY_VDD_MIN 5
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#define HSPHY_VDD_MAX 7
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struct phy_8x16 {
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struct usb_phy phy;
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void __iomem *regs;
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struct clk *core_clk;
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struct clk *iface_clk;
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struct regulator *v3p3;
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struct regulator *v1p8;
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struct regulator *vdd;
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struct reset_control *phy_reset;
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struct extcon_specific_cable_nb vbus_cable;
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struct notifier_block vbus_notify;
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struct gpio_desc *switch_gpio;
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struct notifier_block reboot_notify;
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};
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static int phy_8x16_regulators_enable(struct phy_8x16 *qphy)
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{
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int ret;
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ret = regulator_set_voltage(qphy->vdd, HSPHY_VDD_MIN, HSPHY_VDD_MAX);
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if (ret)
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return ret;
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ret = regulator_enable(qphy->vdd);
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if (ret)
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return ret;
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ret = regulator_set_voltage(qphy->v3p3, HSPHY_3P3_MIN, HSPHY_3P3_MAX);
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if (ret)
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goto off_vdd;
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ret = regulator_enable(qphy->v3p3);
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if (ret)
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goto off_vdd;
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ret = regulator_set_voltage(qphy->v1p8, HSPHY_1P8_MIN, HSPHY_1P8_MAX);
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if (ret)
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goto off_3p3;
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ret = regulator_enable(qphy->v1p8);
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if (ret)
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goto off_3p3;
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return 0;
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off_3p3:
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regulator_disable(qphy->v3p3);
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off_vdd:
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regulator_disable(qphy->vdd);
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return ret;
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}
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static void phy_8x16_regulators_disable(struct phy_8x16 *qphy)
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{
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regulator_disable(qphy->v1p8);
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regulator_disable(qphy->v3p3);
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regulator_disable(qphy->vdd);
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}
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static int phy_8x16_notify_connect(struct usb_phy *phy,
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enum usb_device_speed speed)
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{
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struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
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u32 val;
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val = ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT;
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usb_phy_io_write(&qphy->phy, val, ULPI_SET(ULPI_MISC_A));
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val = readl(qphy->regs + HSPHY_USBCMD);
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val |= HSPHY_SESS_VLD_CTRL;
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writel(val, qphy->regs + HSPHY_USBCMD);
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return 0;
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}
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static int phy_8x16_notify_disconnect(struct usb_phy *phy,
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enum usb_device_speed speed)
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{
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struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
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u32 val;
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val = ULPI_MISC_A_VBUSVLDEXT | ULPI_MISC_A_VBUSVLDEXTSEL;
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usb_phy_io_write(&qphy->phy, val, ULPI_CLR(ULPI_MISC_A));
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val = readl(qphy->regs + HSPHY_USBCMD);
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val &= ~HSPHY_SESS_VLD_CTRL;
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writel(val, qphy->regs + HSPHY_USBCMD);
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return 0;
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}
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static int phy_8x16_vbus_on(struct phy_8x16 *qphy)
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{
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phy_8x16_notify_connect(&qphy->phy, USB_SPEED_UNKNOWN);
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/* Switch D+/D- lines to Device connector */
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gpiod_set_value_cansleep(qphy->switch_gpio, 0);
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return 0;
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}
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static int phy_8x16_vbus_off(struct phy_8x16 *qphy)
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{
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phy_8x16_notify_disconnect(&qphy->phy, USB_SPEED_UNKNOWN);
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/* Switch D+/D- lines to USB HUB */
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gpiod_set_value_cansleep(qphy->switch_gpio, 1);
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return 0;
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}
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static int phy_8x16_vbus_notify(struct notifier_block *nb, unsigned long event,
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void *ptr)
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{
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struct phy_8x16 *qphy = container_of(nb, struct phy_8x16, vbus_notify);
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if (event)
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phy_8x16_vbus_on(qphy);
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else
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phy_8x16_vbus_off(qphy);
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return NOTIFY_DONE;
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}
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static int phy_8x16_init(struct usb_phy *phy)
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{
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struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
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u32 val, init[] = {0x44, 0x6B, 0x24, 0x13};
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u32 addr = ULPI_EXT_VENDOR_SPECIFIC;
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int idx, state;
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for (idx = 0; idx < ARRAY_SIZE(init); idx++)
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usb_phy_io_write(phy, init[idx], addr + idx);
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reset_control_reset(qphy->phy_reset);
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/* Assert USB HSPHY_POR */
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val = readl(qphy->regs + HSPHY_CTRL);
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val |= HSPHY_POR_ASSERT;
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writel(val, qphy->regs + HSPHY_CTRL);
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/*
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* wait for minimum 10 microseconds as suggested in HPG.
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* Use a slightly larger value since the exact value didn't
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* work 100% of the time.
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*/
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usleep_range(12, 15);
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/* Deassert USB HSPHY_POR */
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val = readl(qphy->regs + HSPHY_CTRL);
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val &= ~HSPHY_POR_ASSERT;
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writel(val, qphy->regs + HSPHY_CTRL);
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usleep_range(10, 15);
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writel(0x00, qphy->regs + HSPHY_AHBBURST);
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writel(0x08, qphy->regs + HSPHY_AHBMODE);
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/* workaround for rx buffer collision issue */
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val = readl(qphy->regs + HSPHY_GENCONFIG);
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val &= ~HSPHY_TXFIFO_IDLE_FORCE_DIS;
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writel(val, qphy->regs + HSPHY_GENCONFIG);
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val = readl(qphy->regs + HSPHY_GENCONFIG_2);
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val |= HSPHY_SESS_VLD_CTRL_EN;
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writel(val, qphy->regs + HSPHY_GENCONFIG_2);
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val = ULPI_PWR_OTG_COMP_DISABLE;
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usb_phy_io_write(phy, val, ULPI_SET(ULPI_PWR_CLK_MNG_REG));
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state = extcon_get_cable_state(qphy->vbus_cable.edev, "USB");
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if (state)
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phy_8x16_vbus_on(qphy);
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else
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phy_8x16_vbus_off(qphy);
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val = usb_phy_io_read(&qphy->phy, ULPI_FUNC_CTRL);
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val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
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val |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
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usb_phy_io_write(&qphy->phy, val, ULPI_FUNC_CTRL);
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return 0;
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}
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static void phy_8x16_shutdown(struct usb_phy *phy)
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{
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u32 val;
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/* Put the controller in non-driving mode */
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val = usb_phy_io_read(phy, ULPI_FUNC_CTRL);
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val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
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val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
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usb_phy_io_write(phy, val, ULPI_FUNC_CTRL);
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}
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static int phy_8x16_read_devicetree(struct phy_8x16 *qphy)
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{
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struct regulator_bulk_data regs[3];
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struct device *dev = qphy->phy.dev;
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int ret;
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qphy->core_clk = devm_clk_get(dev, "core");
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if (IS_ERR(qphy->core_clk))
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return PTR_ERR(qphy->core_clk);
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qphy->iface_clk = devm_clk_get(dev, "iface");
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if (IS_ERR(qphy->iface_clk))
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return PTR_ERR(qphy->iface_clk);
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regs[0].supply = "v3p3";
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regs[1].supply = "v1p8";
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regs[2].supply = "vddcx";
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ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(regs), regs);
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if (ret)
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return ret;
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qphy->v3p3 = regs[0].consumer;
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qphy->v1p8 = regs[1].consumer;
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qphy->vdd = regs[2].consumer;
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qphy->phy_reset = devm_reset_control_get(dev, "phy");
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if (IS_ERR(qphy->phy_reset))
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return PTR_ERR(qphy->phy_reset);
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qphy->switch_gpio = devm_gpiod_get_optional(dev, "switch",
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GPIOD_OUT_LOW);
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if (IS_ERR(qphy->switch_gpio))
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return PTR_ERR(qphy->switch_gpio);
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return 0;
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}
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static int phy_8x16_reboot_notify(struct notifier_block *this,
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unsigned long code, void *unused)
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{
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struct phy_8x16 *qphy;
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qphy = container_of(this, struct phy_8x16, reboot_notify);
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/*
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* Ensure that D+/D- lines are routed to uB connector, so
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* we could load bootloader/kernel at next reboot_notify
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*/
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gpiod_set_value_cansleep(qphy->switch_gpio, 0);
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return NOTIFY_DONE;
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}
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static int phy_8x16_probe(struct platform_device *pdev)
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{
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struct extcon_dev *edev;
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struct phy_8x16 *qphy;
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struct resource *res;
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struct usb_phy *phy;
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int ret;
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qphy = devm_kzalloc(&pdev->dev, sizeof(*qphy), GFP_KERNEL);
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if (!qphy)
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return -ENOMEM;
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platform_set_drvdata(pdev, qphy);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -EINVAL;
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qphy->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (!qphy->regs)
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return -ENOMEM;
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phy = &qphy->phy;
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phy->dev = &pdev->dev;
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phy->label = dev_name(&pdev->dev);
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phy->init = phy_8x16_init;
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phy->shutdown = phy_8x16_shutdown;
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phy->notify_connect = phy_8x16_notify_connect;
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phy->notify_disconnect = phy_8x16_notify_disconnect;
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phy->io_priv = qphy->regs + HSPHY_ULPI_VIEWPORT;
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phy->io_ops = &ulpi_viewport_access_ops;
|
||||
phy->type = USB_PHY_TYPE_USB2;
|
||||
|
||||
ret = phy_8x16_read_devicetree(qphy);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
edev = extcon_get_edev_by_phandle(phy->dev, 0);
|
||||
if (IS_ERR(edev))
|
||||
return PTR_ERR(edev);
|
||||
|
||||
ret = clk_set_rate(qphy->core_clk, INT_MAX);
|
||||
if (ret < 0)
|
||||
dev_dbg(phy->dev, "Can't boost core clock\n");
|
||||
|
||||
ret = clk_prepare_enable(qphy->core_clk);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = clk_prepare_enable(qphy->iface_clk);
|
||||
if (ret < 0)
|
||||
goto off_core;
|
||||
|
||||
ret = phy_8x16_regulators_enable(qphy);
|
||||
if (0 && ret)
|
||||
goto off_clks;
|
||||
|
||||
qphy->vbus_notify.notifier_call = phy_8x16_vbus_notify;
|
||||
ret = extcon_register_interest(&qphy->vbus_cable, edev->name,
|
||||
"USB", &qphy->vbus_notify);
|
||||
if (ret < 0)
|
||||
goto off_power;
|
||||
|
||||
ret = usb_add_phy_dev(&qphy->phy);
|
||||
if (ret)
|
||||
goto off_extcon;
|
||||
|
||||
qphy->reboot_notify.notifier_call = phy_8x16_reboot_notify;
|
||||
register_reboot_notifier(&qphy->reboot_notify);
|
||||
|
||||
return 0;
|
||||
|
||||
off_extcon:
|
||||
extcon_unregister_interest(&qphy->vbus_cable);
|
||||
off_power:
|
||||
phy_8x16_regulators_disable(qphy);
|
||||
off_clks:
|
||||
clk_disable_unprepare(qphy->iface_clk);
|
||||
off_core:
|
||||
clk_disable_unprepare(qphy->core_clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int phy_8x16_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct phy_8x16 *qphy = platform_get_drvdata(pdev);
|
||||
|
||||
unregister_reboot_notifier(&qphy->reboot_notify);
|
||||
extcon_unregister_interest(&qphy->vbus_cable);
|
||||
|
||||
/*
|
||||
* Ensure that D+/D- lines are routed to uB connector, so
|
||||
* we could load bootloader/kernel at next reboot_notify
|
||||
*/
|
||||
gpiod_set_value_cansleep(qphy->switch_gpio, 0);
|
||||
|
||||
usb_remove_phy(&qphy->phy);
|
||||
|
||||
clk_disable_unprepare(qphy->iface_clk);
|
||||
clk_disable_unprepare(qphy->core_clk);
|
||||
phy_8x16_regulators_disable(qphy);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id phy_8x16_dt_match[] = {
|
||||
{ .compatible = "qcom,usb-8x16-phy" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, phy_8x16_dt_match);
|
||||
|
||||
static struct platform_driver phy_8x16_driver = {
|
||||
.probe = phy_8x16_probe,
|
||||
.remove = phy_8x16_remove,
|
||||
.driver = {
|
||||
.name = "phy-qcom-8x16-usb",
|
||||
.of_match_table = phy_8x16_dt_match,
|
||||
},
|
||||
};
|
||||
module_platform_driver(phy_8x16_driver);
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DESCRIPTION("Qualcomm APQ8016/MSM8916 chipsets USB transceiver driver");
|
||||
Loading…
Reference in New Issue