drm/radeon: add get_allowed_info_register for CIK

Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2014-10-01 11:18:46 -04:00
parent 4af692f6e3
commit 353eec2ab2
4 changed files with 39 additions and 0 deletions

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@ -141,6 +141,39 @@ static void cik_fini_cg(struct radeon_device *rdev);
static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev, static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev,
bool enable); bool enable);
/**
* cik_get_allowed_info_register - fetch the register for the info ioctl
*
* @rdev: radeon_device pointer
* @reg: register offset in bytes
* @val: register value
*
* Returns 0 for success or -EINVAL for an invalid register
*
*/
int cik_get_allowed_info_register(struct radeon_device *rdev,
u32 reg, u32 *val)
{
switch (reg) {
case GRBM_STATUS:
case GRBM_STATUS2:
case GRBM_STATUS_SE0:
case GRBM_STATUS_SE1:
case GRBM_STATUS_SE2:
case GRBM_STATUS_SE3:
case SRBM_STATUS:
case SRBM_STATUS2:
case (SDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET):
case (SDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET):
case UVD_STATUS:
/* TODO VCE */
*val = RREG32(reg);
return 0;
default:
return -EINVAL;
}
}
/* get temperature in millidegrees */ /* get temperature in millidegrees */
int ci_get_temp(struct radeon_device *rdev) int ci_get_temp(struct radeon_device *rdev)
{ {

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@ -2088,6 +2088,8 @@
# define CLK_OD(x) ((x) << 6) # define CLK_OD(x) ((x) << 6)
# define CLK_OD_MASK (0x1f << 6) # define CLK_OD_MASK (0x1f << 6)
#define UVD_STATUS 0xf6bc
/* UVD clocks */ /* UVD clocks */
#define CG_DCLK_CNTL 0xC050009C #define CG_DCLK_CNTL 0xC050009C

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@ -2075,6 +2075,7 @@ static struct radeon_asic ci_asic = {
.mc_wait_for_idle = &evergreen_mc_wait_for_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.get_xclk = &cik_get_xclk, .get_xclk = &cik_get_xclk,
.get_gpu_clock_counter = &cik_get_gpu_clock_counter, .get_gpu_clock_counter = &cik_get_gpu_clock_counter,
.get_allowed_info_register = cik_get_allowed_info_register,
.gart = { .gart = {
.tlb_flush = &cik_pcie_gart_tlb_flush, .tlb_flush = &cik_pcie_gart_tlb_flush,
.get_page_entry = &rs600_gart_get_page_entry, .get_page_entry = &rs600_gart_get_page_entry,
@ -2187,6 +2188,7 @@ static struct radeon_asic kv_asic = {
.mc_wait_for_idle = &evergreen_mc_wait_for_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.get_xclk = &cik_get_xclk, .get_xclk = &cik_get_xclk,
.get_gpu_clock_counter = &cik_get_gpu_clock_counter, .get_gpu_clock_counter = &cik_get_gpu_clock_counter,
.get_allowed_info_register = cik_get_allowed_info_register,
.gart = { .gart = {
.tlb_flush = &cik_pcie_gart_tlb_flush, .tlb_flush = &cik_pcie_gart_tlb_flush,
.get_page_entry = &rs600_gart_get_page_entry, .get_page_entry = &rs600_gart_get_page_entry,

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@ -865,6 +865,8 @@ void cik_sdma_set_wptr(struct radeon_device *rdev,
struct radeon_ring *ring); struct radeon_ring *ring);
int ci_get_temp(struct radeon_device *rdev); int ci_get_temp(struct radeon_device *rdev);
int kv_get_temp(struct radeon_device *rdev); int kv_get_temp(struct radeon_device *rdev);
int cik_get_allowed_info_register(struct radeon_device *rdev,
u32 reg, u32 *val);
int ci_dpm_init(struct radeon_device *rdev); int ci_dpm_init(struct radeon_device *rdev);
int ci_dpm_enable(struct radeon_device *rdev); int ci_dpm_enable(struct radeon_device *rdev);