mirror of https://gitee.com/openkylin/linux.git
cxgb3: simplify iwch_get_dma_wr
Fold simplified versions of build_phys_page_list and iwch_register_phys_mem into iwch_get_dma_wr now that no other callers are left. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Sagi Grimberg <sagig@mellanox.com> Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> [core] Reviewed-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Christoph Hellwig
Doug Ledford
parent
feb7c1e38b
commit
35cb3fc026
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@ -99,74 +99,3 @@ int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
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return cxio_write_pbl(&mhp->rhp->rdev, pages,
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mhp->attr.pbl_addr + (offset << 3), npages);
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}
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int build_phys_page_list(struct ib_phys_buf *buffer_list,
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int num_phys_buf,
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u64 *iova_start,
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u64 *total_size,
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int *npages,
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int *shift,
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__be64 **page_list)
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{
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u64 mask;
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int i, j, n;
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mask = 0;
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*total_size = 0;
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for (i = 0; i < num_phys_buf; ++i) {
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if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
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return -EINVAL;
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if (i != 0 && i != num_phys_buf - 1 &&
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(buffer_list[i].size & ~PAGE_MASK))
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return -EINVAL;
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*total_size += buffer_list[i].size;
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if (i > 0)
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mask |= buffer_list[i].addr;
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else
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mask |= buffer_list[i].addr & PAGE_MASK;
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if (i != num_phys_buf - 1)
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mask |= buffer_list[i].addr + buffer_list[i].size;
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else
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mask |= (buffer_list[i].addr + buffer_list[i].size +
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PAGE_SIZE - 1) & PAGE_MASK;
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}
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if (*total_size > 0xFFFFFFFFULL)
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return -ENOMEM;
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/* Find largest page shift we can use to cover buffers */
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for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))
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if ((1ULL << *shift) & mask)
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break;
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buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
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buffer_list[0].addr &= ~0ull << *shift;
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*npages = 0;
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for (i = 0; i < num_phys_buf; ++i)
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*npages += (buffer_list[i].size +
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(1ULL << *shift) - 1) >> *shift;
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if (!*npages)
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return -EINVAL;
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*page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);
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if (!*page_list)
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return -ENOMEM;
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n = 0;
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for (i = 0; i < num_phys_buf; ++i)
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for (j = 0;
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j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;
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++j)
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(*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +
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((u64) j << *shift));
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PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",
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__func__, (unsigned long long) *iova_start,
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(unsigned long long) mask, *shift, (unsigned long long) *total_size,
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*npages);
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return 0;
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}
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@ -479,24 +479,25 @@ static int iwch_dereg_mr(struct ib_mr *ib_mr)
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return 0;
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}
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static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
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struct ib_phys_buf *buffer_list,
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int num_phys_buf,
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int acc,
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u64 *iova_start)
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static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
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{
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__be64 *page_list;
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int shift;
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u64 total_size;
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int npages;
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struct iwch_dev *rhp;
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struct iwch_pd *php;
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const u64 total_size = 0xffffffff;
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const u64 mask = (total_size + PAGE_SIZE - 1) & PAGE_MASK;
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struct iwch_pd *php = to_iwch_pd(pd);
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struct iwch_dev *rhp = php->rhp;
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struct iwch_mr *mhp;
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int ret;
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__be64 *page_list;
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int shift = 26, npages, ret, i;
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PDBG("%s ib_pd %p\n", __func__, pd);
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php = to_iwch_pd(pd);
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rhp = php->rhp;
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/*
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* T3 only supports 32 bits of size.
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*/
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if (sizeof(phys_addr_t) > 4) {
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pr_warn_once(MOD "Cannot support dma_mrs on this platform.\n");
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return ERR_PTR(-ENOTSUPP);
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}
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mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
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if (!mhp)
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@ -504,22 +505,23 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
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mhp->rhp = rhp;
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/* First check that we have enough alignment */
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if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) {
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npages = (total_size + (1ULL << shift) - 1) >> shift;
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if (!npages) {
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ret = -EINVAL;
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goto err;
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}
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if (num_phys_buf > 1 &&
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((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) {
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ret = -EINVAL;
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page_list = kmalloc_array(npages, sizeof(u64), GFP_KERNEL);
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if (!page_list) {
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ret = -ENOMEM;
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goto err;
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}
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ret = build_phys_page_list(buffer_list, num_phys_buf, iova_start,
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&total_size, &npages, &shift, &page_list);
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if (ret)
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goto err;
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for (i = 0; i < npages; i++)
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page_list[i] = cpu_to_be64((u64)i << shift);
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PDBG("%s mask 0x%llx shift %d len %lld pbl_size %d\n",
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__func__, mask, shift, total_size, npages);
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ret = iwch_alloc_pbl(mhp, npages);
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if (ret) {
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@ -536,7 +538,7 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
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mhp->attr.zbva = 0;
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mhp->attr.perms = iwch_ib_to_tpt_access(acc);
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mhp->attr.va_fbo = *iova_start;
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mhp->attr.va_fbo = 0;
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mhp->attr.page_size = shift - 12;
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mhp->attr.len = (u32) total_size;
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@ -553,7 +555,6 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
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err:
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kfree(mhp);
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return ERR_PTR(ret);
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}
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static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
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@ -659,28 +660,6 @@ static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
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return ERR_PTR(err);
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}
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static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
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{
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struct ib_phys_buf bl;
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u64 kva;
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struct ib_mr *ibmr;
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PDBG("%s ib_pd %p\n", __func__, pd);
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/*
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* T3 only supports 32 bits of size.
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*/
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if (sizeof(phys_addr_t) > 4) {
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pr_warn_once(MOD "Cannot support dma_mrs on this platform.\n");
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return ERR_PTR(-ENOTSUPP);
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}
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bl.size = 0xffffffff;
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bl.addr = 0;
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kva = 0;
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ibmr = iwch_register_phys_mem(pd, &bl, 1, acc, &kva);
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return ibmr;
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}
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static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd, enum ib_mw_type type)
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{
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struct iwch_dev *rhp;
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@ -341,14 +341,6 @@ int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
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int iwch_alloc_pbl(struct iwch_mr *mhp, int npages);
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void iwch_free_pbl(struct iwch_mr *mhp);
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int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset);
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int build_phys_page_list(struct ib_phys_buf *buffer_list,
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int num_phys_buf,
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u64 *iova_start,
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u64 *total_size,
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int *npages,
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int *shift,
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__be64 **page_list);
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#define IWCH_NODE_DESC "cxgb3 Chelsio Communications"
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