mirror of https://gitee.com/openkylin/linux.git
gpu: ipu-v3: Add SMFC code
The Sensor Multi Fifo Controller (SMFC) is used as a buffer between the two CSIs (writing simultaneously) and up to four IDMAC channels. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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39b9004d1f
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@ -1,3 +1,3 @@
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obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
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imx-ipu-v3-objs := ipu-common.o ipu-dc.o ipu-di.o ipu-dp.o ipu-dmfc.o
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imx-ipu-v3-objs := ipu-common.o ipu-dc.o ipu-di.o ipu-dp.o ipu-dmfc.o ipu-smfc.o
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@ -874,8 +874,17 @@ static int ipu_submodules_init(struct ipu_soc *ipu,
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goto err_dp;
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}
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ret = ipu_smfc_init(ipu, dev, ipu_base +
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devtype->cm_ofs + IPU_CM_SMFC_REG_OFS);
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if (ret) {
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unit = "smfc";
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goto err_smfc;
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}
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return 0;
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err_smfc:
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ipu_dp_exit(ipu);
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err_dp:
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ipu_dmfc_exit(ipu);
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err_dmfc:
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@ -947,6 +956,7 @@ EXPORT_SYMBOL_GPL(ipu_idmac_channel_irq);
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static void ipu_submodules_exit(struct ipu_soc *ipu)
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{
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ipu_smfc_exit(ipu);
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ipu_dp_exit(ipu);
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ipu_dmfc_exit(ipu);
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ipu_dc_exit(ipu);
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@ -151,6 +151,8 @@ struct ipuv3_channel {
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struct ipu_dc_priv;
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struct ipu_dmfc_priv;
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struct ipu_di;
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struct ipu_smfc_priv;
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struct ipu_devtype;
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struct ipu_soc {
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@ -178,6 +180,7 @@ struct ipu_soc {
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struct ipu_dp_priv *dp_priv;
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struct ipu_dmfc_priv *dmfc_priv;
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struct ipu_di *di_priv[2];
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struct ipu_smfc_priv *smfc_priv;
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};
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void ipu_srm_dp_sync_update(struct ipu_soc *ipu);
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@ -203,4 +206,7 @@ void ipu_dc_exit(struct ipu_soc *ipu);
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int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base);
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void ipu_cpmem_exit(struct ipu_soc *ipu);
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int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base);
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void ipu_smfc_exit(struct ipu_soc *ipu);
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#endif /* __IPU_PRV_H__ */
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@ -0,0 +1,97 @@
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/*
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* Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#define DEBUG
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/errno.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <video/imx-ipu-v3.h>
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#include "ipu-prv.h"
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struct ipu_smfc_priv {
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void __iomem *base;
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spinlock_t lock;
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};
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/*SMFC Registers */
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#define SMFC_MAP 0x0000
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#define SMFC_WMC 0x0004
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#define SMFC_BS 0x0008
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int ipu_smfc_set_burstsize(struct ipu_soc *ipu, int channel, int burstsize)
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{
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struct ipu_smfc_priv *smfc = ipu->smfc_priv;
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unsigned long flags;
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u32 val, shift;
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spin_lock_irqsave(&smfc->lock, flags);
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shift = channel * 4;
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val = readl(smfc->base + SMFC_BS);
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val &= ~(0xf << shift);
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val |= burstsize << shift;
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writel(val, smfc->base + SMFC_BS);
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spin_unlock_irqrestore(&smfc->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_set_burstsize);
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int ipu_smfc_map_channel(struct ipu_soc *ipu, int channel, int csi_id, int mipi_id)
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{
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struct ipu_smfc_priv *smfc = ipu->smfc_priv;
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unsigned long flags;
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u32 val, shift;
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spin_lock_irqsave(&smfc->lock, flags);
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shift = channel * 3;
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val = readl(smfc->base + SMFC_MAP);
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val &= ~(0x7 << shift);
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val |= ((csi_id << 2) | mipi_id) << shift;
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writel(val, smfc->base + SMFC_MAP);
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spin_unlock_irqrestore(&smfc->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
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int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev,
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unsigned long base)
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{
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struct ipu_smfc_priv *smfc;
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smfc = devm_kzalloc(dev, sizeof(*smfc), GFP_KERNEL);
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if (!smfc)
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return -ENOMEM;
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ipu->smfc_priv = smfc;
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spin_lock_init(&smfc->lock);
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smfc->base = devm_ioremap(dev, base, PAGE_SIZE);
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if (!smfc->base)
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return -ENOMEM;
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pr_debug("%s: ioremap 0x%08lx -> %p\n", __func__, base, smfc->base);
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return 0;
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}
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void ipu_smfc_exit(struct ipu_soc *ipu)
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{
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}
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@ -160,6 +160,12 @@ int ipu_dp_set_window_pos(struct ipu_dp *, u16 x_pos, u16 y_pos);
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int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable, u8 alpha,
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bool bg_chan);
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/*
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* IPU Sensor Multiple FIFO Controller (SMFC) functions
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*/
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int ipu_smfc_map_channel(struct ipu_soc *ipu, int channel, int csi_id, int mipi_id);
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int ipu_smfc_set_burstsize(struct ipu_soc *ipu, int channel, int burstsize);
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#define IPU_CPMEM_WORD(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size))
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#define IPU_FIELD_UBO IPU_CPMEM_WORD(0, 46, 22)
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