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media: ccs-pll: Fix VT post-PLL divisor calculation 

The PLL calculator only searched even total divisor values apart from one,
but this is wrong: the total divisor is odd in cases where system divisor
is one. Fix this by including odd total PLL values where system divisor is
one to the search.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Sakari Ailus 2020-09-15 21:04:26 +02:00 committed by Mauro Carvalho Chehab
parent 594f1e93bb
commit 36154b68b8
1 changed files with 7 additions and 5 deletions
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12
drivers/media/i2c/ccs-pll.c
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@ -347,14 +347,16 @@ ccs_pll_calculate_vt(struct device *dev, const struct ccs_pll_limits *lim,
* into a value which is not smaller than div, the desired
* divisor.
*/
for (vt_div = min_vt_div; vt_div <= max_vt_div;
vt_div += 2 - (vt_div & 1)) {
for (sys_div = min_sys_div;
sys_div <= max_sys_div;
for (vt_div = min_vt_div; vt_div <= max_vt_div; vt_div++) {
uint16_t __max_sys_div = vt_div & 1 ? 1 : max_sys_div;
for (sys_div = min_sys_div; sys_div <= __max_sys_div;
sys_div += 2 - (sys_div & 1)) {
uint16_t pix_div = DIV_ROUND_UP(vt_div, sys_div);
uint16_t pix_div;
uint16_t rounded_div;
pix_div = DIV_ROUND_UP(vt_div, sys_div);
if (pix_div < lim->vt_bk.min_pix_clk_div
|| pix_div > lim->vt_bk.max_pix_clk_div) {
dev_dbg(dev,