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arm64: dts: marvell: use new binding for the system controller on ap806 

The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes

Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Gregory CLEMENT 2017-05-31 16:07:28 +02:00
parent 952eaa509d
commit 3675fb5980
1 changed files with 11 additions and 8 deletions
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19
arch/arm64/boot/dts/marvell/armada-ap806.dtsi
View File

@ -197,7 +197,7 @@ spi0: spi@510600 {
#size-cells = <0>;
cell-index = <0>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ap_syscon 3>;
clocks = <&ap_clk 3>;
status = "disabled";
};
@ -208,7 +208,7 @@ i2c0: i2c@511000 {
#size-cells = <0>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
timeout-ms = <1000>;
clocks = <&ap_syscon 3>;
clocks = <&ap_clk 3>;
status = "disabled";
};
@ -218,7 +218,7 @@ uart0: serial@512000 {
reg-shift = <2>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&ap_syscon 3>;
clocks = <&ap_clk 3>;
status = "disabled";
};
@ -228,7 +228,7 @@ uart1: serial@512100 {
reg-shift = <2>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&ap_syscon 3>;
clocks = <&ap_clk 3>;
status = "disabled";
};
@ -238,17 +238,20 @@ ap_sdhci0: sdhci@6e0000 {
reg = <0x6e0000 0x300>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "core";
clocks = <&ap_syscon 4>;
clocks = <&ap_clk 4>;
dma-coherent;
marvell,xenon-phy-slow-mode;
status = "disabled";
};
ap_syscon: system-controller@6f4000 {
compatible = "marvell,ap806-system-controller",
"syscon";
#clock-cells = <1>;
compatible = "syscon", "simple-mfd";
reg = <0x6f4000 0x1000>;
ap_clk: clock {
compatible = "marvell,ap806-clock";
#clock-cells = <1>;
};
};
};
};