mirror of https://gitee.com/openkylin/linux.git
OMAPDSS: SDI: use new clock calculation code
Use the new clock calculation code in the SDI driver. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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72658f0716
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@ -41,6 +41,72 @@ static struct {
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struct omap_dss_output output;
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struct omap_dss_output output;
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} sdi;
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} sdi;
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struct sdi_clk_calc_ctx {
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unsigned long pck_min, pck_max;
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struct dss_clock_info dss_cinfo;
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struct dispc_clock_info dispc_cinfo;
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};
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static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
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unsigned long pck, void *data)
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{
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struct sdi_clk_calc_ctx *ctx = data;
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ctx->dispc_cinfo.lck_div = lckd;
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ctx->dispc_cinfo.pck_div = pckd;
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ctx->dispc_cinfo.lck = lck;
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ctx->dispc_cinfo.pck = pck;
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return true;
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}
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static bool dpi_calc_dss_cb(int fckd, unsigned long fck, void *data)
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{
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struct sdi_clk_calc_ctx *ctx = data;
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ctx->dss_cinfo.fck = fck;
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ctx->dss_cinfo.fck_div = fckd;
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return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
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dpi_calc_dispc_cb, ctx);
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}
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static int sdi_calc_clock_div(unsigned long pclk,
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struct dss_clock_info *dss_cinfo,
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struct dispc_clock_info *dispc_cinfo)
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{
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int i;
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struct sdi_clk_calc_ctx ctx;
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/*
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* DSS fclk gives us very few possibilities, so finding a good pixel
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* clock may not be possible. We try multiple times to find the clock,
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* each time widening the pixel clock range we look for, up to
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* +/- 1MHz.
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*/
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for (i = 0; i < 10; ++i) {
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bool ok;
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memset(&ctx, 0, sizeof(ctx));
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if (pclk > 1000 * i * i * i)
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ctx.pck_min = max(pclk - 1000 * i * i * i, 0lu);
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else
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ctx.pck_min = 0;
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ctx.pck_max = pclk + 1000 * i * i * i;
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ok = dss_div_calc(ctx.pck_min, dpi_calc_dss_cb, &ctx);
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if (ok) {
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*dss_cinfo = ctx.dss_cinfo;
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*dispc_cinfo = ctx.dispc_cinfo;
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return 0;
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}
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}
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return -EINVAL;
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}
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static void sdi_config_lcd_manager(struct omap_dss_device *dssdev)
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static void sdi_config_lcd_manager(struct omap_dss_device *dssdev)
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{
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{
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struct omap_overlay_manager *mgr = dssdev->output->manager;
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struct omap_overlay_manager *mgr = dssdev->output->manager;
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@ -88,7 +154,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
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t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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r = dss_calc_clock_div(t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo);
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r = sdi_calc_clock_div(t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo);
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if (r)
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if (r)
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goto err_calc_clock_div;
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goto err_calc_clock_div;
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