mirror of https://gitee.com/openkylin/linux.git
s3fb: fix 15/16bpp modes with over 115MHz pixclocks on 86C365 Trio3D
Enable pixel multiplexing in 15/16bpp modes when pixclock is over 115MHz on Trio3D (86C365) cards to fix artifacts on the left side of screen. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Acked-by: Ondrej Zajicek <santiago@crfreenet.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -675,6 +675,15 @@ static int s3fb_set_par(struct fb_info *info)
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0);
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else
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0);
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} else if (par->chip == CHIP_365_TRIO3D) {
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svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);
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if (info->var.pixclock > 8695) {
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0);
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hmul = 2;
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} else {
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0);
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multiplex = 1;
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}
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} else {
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svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0);
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@ -691,6 +700,15 @@ static int s3fb_set_par(struct fb_info *info)
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0);
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else
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0);
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} else if (par->chip == CHIP_365_TRIO3D) {
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svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);
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if (info->var.pixclock > 8695) {
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0);
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hmul = 2;
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} else {
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0);
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multiplex = 1;
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}
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} else {
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svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);
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svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0);
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