mirror of https://gitee.com/openkylin/linux.git
drm/radeon/kms: fix up LVDS handling on macs (v2)
Based on radeonfb code and recent ddx fix. v2: minor formatting fix from Michel Dänzer Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Reviewed-by: Michel Dänzer <michel@daenzer.net> Tested-by: Michel Dänzer <michel@daenzer.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -46,6 +46,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man;
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int panel_pwr_delay = 2000;
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bool is_mac = false;
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DRM_DEBUG("\n");
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if (radeon_encoder->enc_priv) {
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@ -58,6 +59,15 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
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}
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}
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/* macs (and possibly some x86 oem systems?) wire up LVDS strangely
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* Taken from radeonfb.
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*/
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if ((rdev->mode_info.connector_table == CT_IBOOK) ||
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(rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) ||
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(rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) ||
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(rdev->mode_info.connector_table == CT_POWERBOOK_VGA))
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is_mac = true;
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switch (mode) {
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case DRM_MODE_DPMS_ON:
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disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN);
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@ -74,6 +84,8 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
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lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
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lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON);
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if (is_mac)
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lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
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lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
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udelay(panel_pwr_delay * 1000);
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WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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@ -85,7 +97,14 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
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WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
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lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
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lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
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lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
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if (is_mac) {
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lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN;
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WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN);
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} else {
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WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
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}
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udelay(panel_pwr_delay * 1000);
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WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
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