mirror of https://gitee.com/openkylin/linux.git
usb: dwc2: Fix comment alignment and format
Fix misaligned and over 80-character comments. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This commit is contained in:
parent
3b1920e782
commit
38beaec6fc
|
@ -603,8 +603,8 @@ struct dwc2_hw_params {
|
|||
#define DWC2_CTRL_BUFF_SIZE 8
|
||||
|
||||
/**
|
||||
* struct dwc2_gregs_backup - Holds global registers state before entering partial
|
||||
* power down
|
||||
* struct dwc2_gregs_backup - Holds global registers state before
|
||||
* entering partial power down
|
||||
* @gotgctl: Backup of GOTGCTL register
|
||||
* @gintmsk: Backup of GINTMSK register
|
||||
* @gahbcfg: Backup of GAHBCFG register
|
||||
|
@ -634,8 +634,8 @@ struct dwc2_gregs_backup {
|
|||
};
|
||||
|
||||
/**
|
||||
* struct dwc2_dregs_backup - Holds device registers state before entering partial
|
||||
* power down
|
||||
* struct dwc2_dregs_backup - Holds device registers state before
|
||||
* entering partial power down
|
||||
* @dcfg: Backup of DCFG register
|
||||
* @dctl: Backup of DCTL register
|
||||
* @daintmsk: Backup of DAINTMSK register
|
||||
|
@ -664,8 +664,8 @@ struct dwc2_dregs_backup {
|
|||
};
|
||||
|
||||
/**
|
||||
* struct dwc2_hregs_backup - Holds host registers state before entering partial
|
||||
* power down
|
||||
* struct dwc2_hregs_backup - Holds host registers state before
|
||||
* entering partial power down
|
||||
* @hcfg: Backup of HCFG register
|
||||
* @haintmsk: Backup of HAINTMSK register
|
||||
* @hcintmsk: Backup of HCINTMSK register
|
||||
|
@ -782,9 +782,10 @@ struct dwc2_hregs_backup {
|
|||
* @gadget_enabled Peripheral mode sub-driver initialization indicator.
|
||||
* @ll_hw_enabled Status of low-level hardware resources.
|
||||
* @phy: The otg phy transceiver structure for phy control.
|
||||
* @uphy: The otg phy transceiver structure for old USB phy control.
|
||||
* @plat: The platform specific configuration data. This can be removed once
|
||||
* all SoCs support usb transceiver.
|
||||
* @uphy: The otg phy transceiver structure for old USB phy
|
||||
* control.
|
||||
* @plat: The platform specific configuration data. This can be
|
||||
* removed once all SoCs support usb transceiver.
|
||||
* @supplies: Definition of USB power supplies
|
||||
* @phyif: PHY interface width
|
||||
* @lock: Spinlock that protects all the driver data structures
|
||||
|
|
|
@ -581,11 +581,11 @@ static unsigned int get_ep_limit(struct dwc2_hsotg_ep *hs_ep)
|
|||
}
|
||||
|
||||
/**
|
||||
* dwc2_hsotg_read_frameno - read current frame number
|
||||
* @hsotg: The device instance
|
||||
*
|
||||
* Return the current frame number
|
||||
*/
|
||||
* dwc2_hsotg_read_frameno - read current frame number
|
||||
* @hsotg: The device instance
|
||||
*
|
||||
* Return the current frame number
|
||||
*/
|
||||
static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg)
|
||||
{
|
||||
u32 dsts;
|
||||
|
@ -1467,8 +1467,11 @@ static int dwc2_hsotg_process_req_status(struct dwc2_hsotg *hsotg,
|
|||
|
||||
switch (ctrl->bRequestType & USB_RECIP_MASK) {
|
||||
case USB_RECIP_DEVICE:
|
||||
reply = cpu_to_le16(0); /* bit 0 => self powered,
|
||||
* bit 1 => remote wakeup */
|
||||
/*
|
||||
* bit 0 => self powered
|
||||
* bit 1 => remote wakeup
|
||||
*/
|
||||
reply = cpu_to_le16(0);
|
||||
break;
|
||||
|
||||
case USB_RECIP_INTERFACE:
|
||||
|
@ -2750,19 +2753,19 @@ static void dwc2_gadget_handle_out_token_ep_disabled(struct dwc2_hsotg_ep *ep)
|
|||
}
|
||||
|
||||
/**
|
||||
* dwc2_gadget_handle_nak - handle NAK interrupt
|
||||
* @hs_ep: The endpoint on which interrupt is asserted.
|
||||
*
|
||||
* This is starting point for ISOC-IN transfer, synchronization done with
|
||||
* first IN token received from host while corresponding EP is disabled.
|
||||
*
|
||||
* Device does not know when first one token will arrive from host. On first
|
||||
* token arrival HW generates 2 interrupts: 'in token received while FIFO empty'
|
||||
* and 'NAK'. NAK interrupt for ISOC-IN means that token has arrived and ZLP was
|
||||
* sent in response to that as there was no data in FIFO. SW is basing on this
|
||||
* interrupt to obtain frame in which token has come and then based on the
|
||||
* interval calculates next frame for transfer.
|
||||
*/
|
||||
* dwc2_gadget_handle_nak - handle NAK interrupt
|
||||
* @hs_ep: The endpoint on which interrupt is asserted.
|
||||
*
|
||||
* This is starting point for ISOC-IN transfer, synchronization done with
|
||||
* first IN token received from host while corresponding EP is disabled.
|
||||
*
|
||||
* Device does not know when first one token will arrive from host. On first
|
||||
* token arrival HW generates 2 interrupts: 'in token received while FIFO empty'
|
||||
* and 'NAK'. NAK interrupt for ISOC-IN means that token has arrived and ZLP was
|
||||
* sent in response to that as there was no data in FIFO. SW is basing on this
|
||||
* interrupt to obtain frame in which token has come and then based on the
|
||||
* interval calculates next frame for transfer.
|
||||
*/
|
||||
static void dwc2_gadget_handle_nak(struct dwc2_hsotg_ep *hs_ep)
|
||||
{
|
||||
struct dwc2_hsotg *hsotg = hs_ep->parent;
|
||||
|
|
|
@ -3045,7 +3045,7 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
|
|||
* now. This function is called from interrupt
|
||||
* handlers to queue more transactions as transfer
|
||||
* states change.
|
||||
*/
|
||||
*/
|
||||
gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
|
||||
if (gintmsk & GINTSTS_PTXFEMP) {
|
||||
gintmsk &= ~GINTSTS_PTXFEMP;
|
||||
|
|
|
@ -1389,22 +1389,27 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
|
|||
int end_frnum;
|
||||
|
||||
/*
|
||||
* Figure out the end frame based on schedule.
|
||||
*
|
||||
* We don't want to go on trying again and again
|
||||
* forever. Let's stop when we've done all the
|
||||
* transfers that were scheduled.
|
||||
*
|
||||
* We're going to be comparing start_active_frame
|
||||
* and next_active_frame, both of which are 1
|
||||
* before the time the packet goes on the wire,
|
||||
* so that cancels out. Basically if had 1
|
||||
* transfer and we saw 1 NYET then we're done.
|
||||
* We're getting a NYET here so if next >=
|
||||
* (start + num_transfers) we're done. The
|
||||
* complexity is that for all but ISOC_OUT we
|
||||
* skip one slot.
|
||||
*/
|
||||
* Figure out the end frame based on
|
||||
* schedule.
|
||||
*
|
||||
* We don't want to go on trying again
|
||||
* and again forever. Let's stop when
|
||||
* we've done all the transfers that
|
||||
* were scheduled.
|
||||
*
|
||||
* We're going to be comparing
|
||||
* start_active_frame and
|
||||
* next_active_frame, both of which
|
||||
* are 1 before the time the packet
|
||||
* goes on the wire, so that cancels
|
||||
* out. Basically if had 1 transfer
|
||||
* and we saw 1 NYET then we're done.
|
||||
* We're getting a NYET here so if
|
||||
* next >= (start + num_transfers)
|
||||
* we're done. The complexity is that
|
||||
* for all but ISOC_OUT we skip one
|
||||
* slot.
|
||||
*/
|
||||
end_frnum = dwc2_frame_num_inc(
|
||||
qh->start_active_frame,
|
||||
qh->num_hs_transfers);
|
||||
|
|
Loading…
Reference in New Issue