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usb: dwc2: Fix comment alignment and format
Fix misaligned and over 80-character comments. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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@ -603,8 +603,8 @@ struct dwc2_hw_params {
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#define DWC2_CTRL_BUFF_SIZE 8
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#define DWC2_CTRL_BUFF_SIZE 8
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/**
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/**
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* struct dwc2_gregs_backup - Holds global registers state before entering partial
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* struct dwc2_gregs_backup - Holds global registers state before
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* power down
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* entering partial power down
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* @gotgctl: Backup of GOTGCTL register
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* @gotgctl: Backup of GOTGCTL register
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* @gintmsk: Backup of GINTMSK register
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* @gintmsk: Backup of GINTMSK register
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* @gahbcfg: Backup of GAHBCFG register
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* @gahbcfg: Backup of GAHBCFG register
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@ -634,8 +634,8 @@ struct dwc2_gregs_backup {
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};
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};
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/**
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/**
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* struct dwc2_dregs_backup - Holds device registers state before entering partial
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* struct dwc2_dregs_backup - Holds device registers state before
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* power down
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* entering partial power down
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* @dcfg: Backup of DCFG register
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* @dcfg: Backup of DCFG register
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* @dctl: Backup of DCTL register
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* @dctl: Backup of DCTL register
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* @daintmsk: Backup of DAINTMSK register
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* @daintmsk: Backup of DAINTMSK register
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@ -664,8 +664,8 @@ struct dwc2_dregs_backup {
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};
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};
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/**
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/**
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* struct dwc2_hregs_backup - Holds host registers state before entering partial
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* struct dwc2_hregs_backup - Holds host registers state before
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* power down
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* entering partial power down
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* @hcfg: Backup of HCFG register
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* @hcfg: Backup of HCFG register
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* @haintmsk: Backup of HAINTMSK register
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* @haintmsk: Backup of HAINTMSK register
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* @hcintmsk: Backup of HCINTMSK register
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* @hcintmsk: Backup of HCINTMSK register
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@ -782,9 +782,10 @@ struct dwc2_hregs_backup {
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* @gadget_enabled Peripheral mode sub-driver initialization indicator.
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* @gadget_enabled Peripheral mode sub-driver initialization indicator.
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* @ll_hw_enabled Status of low-level hardware resources.
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* @ll_hw_enabled Status of low-level hardware resources.
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* @phy: The otg phy transceiver structure for phy control.
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* @phy: The otg phy transceiver structure for phy control.
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* @uphy: The otg phy transceiver structure for old USB phy control.
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* @uphy: The otg phy transceiver structure for old USB phy
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* @plat: The platform specific configuration data. This can be removed once
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* control.
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* all SoCs support usb transceiver.
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* @plat: The platform specific configuration data. This can be
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* removed once all SoCs support usb transceiver.
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* @supplies: Definition of USB power supplies
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* @supplies: Definition of USB power supplies
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* @phyif: PHY interface width
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* @phyif: PHY interface width
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* @lock: Spinlock that protects all the driver data structures
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* @lock: Spinlock that protects all the driver data structures
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@ -1467,8 +1467,11 @@ static int dwc2_hsotg_process_req_status(struct dwc2_hsotg *hsotg,
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switch (ctrl->bRequestType & USB_RECIP_MASK) {
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switch (ctrl->bRequestType & USB_RECIP_MASK) {
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case USB_RECIP_DEVICE:
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case USB_RECIP_DEVICE:
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reply = cpu_to_le16(0); /* bit 0 => self powered,
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/*
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* bit 1 => remote wakeup */
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* bit 0 => self powered
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* bit 1 => remote wakeup
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*/
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reply = cpu_to_le16(0);
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break;
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break;
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case USB_RECIP_INTERFACE:
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case USB_RECIP_INTERFACE:
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@ -1389,21 +1389,26 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
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int end_frnum;
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int end_frnum;
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/*
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/*
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* Figure out the end frame based on schedule.
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* Figure out the end frame based on
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* schedule.
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*
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*
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* We don't want to go on trying again and again
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* We don't want to go on trying again
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* forever. Let's stop when we've done all the
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* and again forever. Let's stop when
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* transfers that were scheduled.
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* we've done all the transfers that
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* were scheduled.
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*
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*
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* We're going to be comparing start_active_frame
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* We're going to be comparing
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* and next_active_frame, both of which are 1
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* start_active_frame and
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* before the time the packet goes on the wire,
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* next_active_frame, both of which
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* so that cancels out. Basically if had 1
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* are 1 before the time the packet
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* transfer and we saw 1 NYET then we're done.
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* goes on the wire, so that cancels
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* We're getting a NYET here so if next >=
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* out. Basically if had 1 transfer
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* (start + num_transfers) we're done. The
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* and we saw 1 NYET then we're done.
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* complexity is that for all but ISOC_OUT we
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* We're getting a NYET here so if
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* skip one slot.
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* next >= (start + num_transfers)
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* we're done. The complexity is that
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* for all but ISOC_OUT we skip one
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* slot.
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*/
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*/
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end_frnum = dwc2_frame_num_inc(
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end_frnum = dwc2_frame_num_inc(
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qh->start_active_frame,
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qh->start_active_frame,
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