mirror of https://gitee.com/openkylin/linux.git
staging: tidspbridge: remove GlobalTypes.h
Remove custom globaltypes.h header Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Menon, Nishanth
Greg Kroah-Hartman
parent
c30d6cb7fb
commit
38bf20a9b6
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@ -1,291 +0,0 @@
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/*
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* GlobalTypes.h
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*
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* DSP-BIOS Bridge driver support functions for TI OMAP processors.
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*
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* Global HW definitions
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*
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* Copyright (C) 2007 Texas Instruments, Inc.
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*
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* This package is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*/
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#ifndef _GLOBALTYPES_H
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#define _GLOBALTYPES_H
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/*
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* Definition: RET_CODE_BASE
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*
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* DESCRIPTION: Base value for return code offsets
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*/
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#define RET_CODE_BASE 0
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/*
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* Definition: *BIT_OFFSET
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*
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* DESCRIPTION: offset in bytes from start of 32-bit word.
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*/
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#define LOWER16BIT_OFFSET 0
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#define UPPER16BIT_OFFSET 2
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#define LOWER8BIT_OFFSET 0
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#define LOWER_MIDDLE8BIT_OFFSET 1
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#define UPPER_MIDDLE8BIT_OFFSET 2
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#define UPPER8BIT_OFFSET 3
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#define LOWER8BIT_OF16_OFFSET 0
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#define UPPER8BIT_OF16_OFFSET 1
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/*
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* Definition: *BIT_SHIFT
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*
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* DESCRIPTION: offset in bits from start of 32-bit word.
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*/
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#define LOWER16BIT_SHIFT 0
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#define UPPER16BIT_SHIFT 16
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#define LOWER8BIT_SHIFT 0
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#define LOWER_MIDDLE8BIT_SHIFT 8
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#define UPPER_MIDDLE8BIT_SHIFT 16
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#define UPPER8BIT_SHIFT 24
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#define LOWER8BIT_OF16_SHIFT 0
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#define UPPER8BIT_OF16_SHIFT 8
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/*
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* Definition: LOWER16BIT_MASK
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*
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* DESCRIPTION: 16 bit mask used for inclusion of lower 16 bits i.e. mask out
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* the upper 16 bits
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*/
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#define LOWER16BIT_MASK 0x0000FFFF
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/*
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* Definition: LOWER8BIT_MASK
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*
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* DESCRIPTION: 8 bit masks used for inclusion of 8 bits i.e. mask out
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* the upper 16 bits
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*/
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#define LOWER8BIT_MASK 0x000000FF
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/*
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* Definition: RETURN32BITS_FROM16LOWER_AND16UPPER(lower16_bits, upper16_bits)
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*
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* DESCRIPTION: Returns a 32 bit value given a 16 bit lower value and a 16
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* bit upper value
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*/
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#define RETURN32BITS_FROM16LOWER_AND16UPPER(lower16_bits, upper16_bits)\
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(((((u32)lower16_bits) & LOWER16BIT_MASK)) | \
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(((((u32)upper16_bits) & LOWER16BIT_MASK) << UPPER16BIT_SHIFT)))
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/*
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* Definition: RETURN16BITS_FROM8LOWER_AND8UPPER(lower16_bits, upper16_bits)
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*
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* DESCRIPTION: Returns a 16 bit value given a 8 bit lower value and a 8
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* bit upper value
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*/
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#define RETURN16BITS_FROM8LOWER_AND8UPPER(lower8_bits, upper8_bits)\
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(((((u32)lower8_bits) & LOWER8BIT_MASK)) | \
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(((((u32)upper8_bits) & LOWER8BIT_MASK) << UPPER8BIT_OF16_SHIFT)))
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/*
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* Definition: RETURN32BITS_FROM48BIT_VALUES(lower8_bits, lower_middle8_bits,
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* lower_upper8_bits, upper8_bits)
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*
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* DESCRIPTION: Returns a 32 bit value given four 8 bit values
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*/
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#define RETURN32BITS_FROM48BIT_VALUES(lower8_bits, lower_middle8_bits,\
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lower_upper8_bits, upper8_bits)\
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(((((u32)lower8_bits) & LOWER8BIT_MASK)) | \
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(((((u32)lower_middle8_bits) & LOWER8BIT_MASK) <<\
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LOWER_MIDDLE8BIT_SHIFT)) | \
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(((((u32)lower_upper8_bits) & LOWER8BIT_MASK) <<\
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UPPER_MIDDLE8BIT_SHIFT)) | \
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(((((u32)upper8_bits) & LOWER8BIT_MASK) <<\
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UPPER8BIT_SHIFT)))
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/*
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* Definition: READ_LOWER16BITS_OF32(value32bits)
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*
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* DESCRIPTION: Returns a 16 lower bits of 32bit value
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*/
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#define READ_LOWER16BITS_OF32(value32bits)\
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((u16)((u32)(value32bits) & LOWER16BIT_MASK))
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/*
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* Definition: READ_UPPER16BITS_OF32(value32bits)
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*
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* DESCRIPTION: Returns a 16 lower bits of 32bit value
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*/
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#define READ_UPPER16BITS_OF32(value32bits)\
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(((u16)((u32)(value32bits) >> UPPER16BIT_SHIFT)) &\
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LOWER16BIT_MASK)
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/*
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* Definition: READ_LOWER8BITS_OF32(value32bits)
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*
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* DESCRIPTION: Returns a 8 lower bits of 32bit value
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*/
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#define READ_LOWER8BITS_OF32(value32bits)\
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((u8)((u32)(value32bits) & LOWER8BIT_MASK))
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/*
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* Definition: READ_LOWER_MIDDLE8BITS_OF32(value32bits)
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*
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* DESCRIPTION: Returns a 8 lower middle bits of 32bit value
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*/
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#define READ_LOWER_MIDDLE8BITS_OF32(value32bits)\
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(((u8)((u32)(value32bits) >> LOWER_MIDDLE8BIT_SHIFT)) &\
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LOWER8BIT_MASK)
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/*
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* Definition: READ_LOWER_MIDDLE8BITS_OF32(value32bits)
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*
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* DESCRIPTION: Returns a 8 lower middle bits of 32bit value
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*/
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#define READ_UPPER_MIDDLE8BITS_OF32(value32bits)\
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(((u8)((u32)(value32bits) >> LOWER_MIDDLE8BIT_SHIFT)) &\
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LOWER8BIT_MASK)
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/*
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* Definition: READ_UPPER8BITS_OF32(value32bits)
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*
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* DESCRIPTION: Returns a 8 upper bits of 32bit value
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*/
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#define READ_UPPER8BITS_OF32(value32bits)\
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(((u8)((u32)(value32bits) >> UPPER8BIT_SHIFT)) & LOWER8BIT_MASK)
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/*
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* Definition: READ_LOWER8BITS_OF16(value16bits)
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*
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* DESCRIPTION: Returns a 8 lower bits of 16bit value
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*/
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#define READ_LOWER8BITS_OF16(value16bits)\
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((u8)((u16)(value16bits) & LOWER8BIT_MASK))
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/*
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* Definition: READ_UPPER8BITS_OF16(value32bits)
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*
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* DESCRIPTION: Returns a 8 upper bits of 16bit value
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*/
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#define READ_UPPER8BITS_OF16(value16bits)\
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(((u8)((u32)(value16bits) >> UPPER8BIT_SHIFT)) & LOWER8BIT_MASK)
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/* UWORD16: 16 bit tpyes */
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/* reg_uword8, reg_word8: 8 bit register types */
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typedef volatile unsigned char reg_uword8;
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typedef volatile signed char reg_word8;
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/* reg_uword16, reg_word16: 16 bit register types */
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#ifndef OMAPBRIDGE_TYPES
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typedef volatile unsigned short reg_uword16;
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#endif
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typedef volatile short reg_word16;
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/* reg_uword32, REG_WORD32: 32 bit register types */
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typedef volatile unsigned long reg_uword32;
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/* FLOAT
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*
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* Type to be used for floating point calculation. Note that floating point
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* calculation is very CPU expensive, and you should only use if you
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* absolutely need this. */
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/* boolean_t: Boolean Type True, False */
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/* return_code_t: Return codes to be returned by all library functions */
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enum return_code_label {
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RET_OK = 0,
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RET_FAIL = -1,
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RET_BAD_NULL_PARAM = -2,
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RET_PARAM_OUT_OF_RANGE = -3,
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RET_INVALID_ID = -4,
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RET_EMPTY = -5,
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RET_FULL = -6,
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RET_TIMEOUT = -7,
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RET_INVALID_OPERATION = -8,
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/* Add new error codes at end of above list */
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RET_NUM_RET_CODES /* this should ALWAYS be LAST entry */
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};
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/* MACRO: RD_MEM8, WR_MEM8
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*
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* DESCRIPTION: 32 bit memory access macros
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*/
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#define RD_MEM8(addr) ((u8)(*((u8 *)(addr))))
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#define WR_MEM8(addr, data) (*((u8 *)(addr)) = (u8)(data))
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/* MACRO: RD_MEM8_VOLATILE, WR_MEM8_VOLATILE
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*
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* DESCRIPTION: 8 bit register access macros
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*/
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#define RD_MEM8_VOLATILE(addr) ((u8)(*((reg_uword8 *)(addr))))
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#define WR_MEM8_VOLATILE(addr, data) (*((reg_uword8 *)(addr)) = (u8)(data))
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/*
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* MACRO: RD_MEM16, WR_MEM16
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*
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* DESCRIPTION: 16 bit memory access macros
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*/
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#define RD_MEM16(addr) ((u16)(*((u16 *)(addr))))
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#define WR_MEM16(addr, data) (*((u16 *)(addr)) = (u16)(data))
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/*
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* MACRO: RD_MEM16_VOLATILE, WR_MEM16_VOLATILE
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*
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* DESCRIPTION: 16 bit register access macros
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*/
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#define RD_MEM16_VOLATILE(addr) ((u16)(*((reg_uword16 *)(addr))))
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#define WR_MEM16_VOLATILE(addr, data) (*((reg_uword16 *)(addr)) =\
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(u16)(data))
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/*
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* MACRO: RD_MEM32, WR_MEM32
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*
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* DESCRIPTION: 32 bit memory access macros
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*/
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#define RD_MEM32(addr) ((u32)(*((u32 *)(addr))))
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#define WR_MEM32(addr, data) (*((u32 *)(addr)) = (u32)(data))
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/*
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* MACRO: RD_MEM32_VOLATILE, WR_MEM32_VOLATILE
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*
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* DESCRIPTION: 32 bit register access macros
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*/
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#define RD_MEM32_VOLATILE(addr) ((u32)(*((reg_uword32 *)(addr))))
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#define WR_MEM32_VOLATILE(addr, data) (*((reg_uword32 *)(addr)) =\
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(u32)(data))
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/* Not sure if this all belongs here */
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#define CHECK_RETURN_VALUE(actual_value, expected_value,\
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return_code_if_mismatch, spy_code_if_mis_match)
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#define CHECK_RETURN_VALUE_RET(actual_value, expected_value,\
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return_code_if_mismatch)
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#define CHECK_RETURN_VALUE_RES(actual_value, expected_value,\
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spy_code_if_mis_match)
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#define CHECK_RETURN_VALUE_RET_VOID(actual_value, expected_value,\
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spy_code_if_mis_match)
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#define CHECK_INPUT_PARAM(actual_value, invalid_value,\
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return_code_if_mismatch, spy_code_if_mis_match)
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#define CHECK_INPUT_PARAM_NO_SPY(actual_value, invalid_value,\
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return_code_if_mismatch)
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#define CHECK_INPUT_RANGE(actual_value, min_valid_value, max_valid_value,\
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return_code_if_mismatch, spy_code_if_mis_match)
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#define CHECK_INPUT_RANGE_NO_SPY(actual_value, min_valid_value,\
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max_valid_value, return_code_if_mismatch)
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#define CHECK_INPUT_RANGE_MIN0(actual_value, max_valid_value,\
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return_code_if_mismatch, spy_code_if_mis_match)
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#define CHECK_INPUT_RANGE_NO_SPY_MIN0(actual_value, max_valid_value,\
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return_code_if_mismatch)
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#endif /* _GLOBALTYPES_H */
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@ -17,7 +17,6 @@
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#ifndef _MMU_REG_ACM_H
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#define _MMU_REG_ACM_H
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#include <GlobalTypes.h>
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#include <linux/io.h>
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#include <EasiGlobal.h>
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@ -19,8 +19,6 @@
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#ifndef _HW_DEFS_H
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#define _HW_DEFS_H
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#include <GlobalTypes.h>
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/* Page size */
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#define HW_PAGE_SIZE4KB 0x1000
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#define HW_PAGE_SIZE64KB 0x10000
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@ -16,7 +16,6 @@
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*/
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#include <GlobalTypes.h>
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#include <linux/io.h>
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#include "MMURegAcM.h"
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#include <hw_defs.h>
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@ -250,10 +249,6 @@ hw_status hw_mmu_fault_addr_read(const void __iomem *base_address, u32 *addr)
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{
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hw_status status = 0;
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/*Check the input Parameters */
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CHECK_INPUT_PARAM(base_address, 0, RET_BAD_NULL_PARAM,
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RES_MMU_BASE + RES_INVALID_INPUT_PARAM);
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/* read values from register */
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*addr = MMUMMU_FAULT_AD_READ_REGISTER32(base_address);
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@ -265,10 +260,6 @@ hw_status hw_mmu_ttb_set(const void __iomem *base_address, u32 ttb_phys_addr)
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hw_status status = 0;
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u32 load_ttb;
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/*Check the input Parameters */
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CHECK_INPUT_PARAM(base_address, 0, RET_BAD_NULL_PARAM,
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RES_MMU_BASE + RES_INVALID_INPUT_PARAM);
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load_ttb = ttb_phys_addr & ~0x7FUL;
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/* write values to register */
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MMUMMU_TTB_WRITE_REGISTER32(base_address, load_ttb);
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@ -346,14 +337,6 @@ hw_status hw_mmu_tlb_add(const void __iomem *base_address,
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enum hw_mmu_page_size_t mmu_pg_size;
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/*Check the input Parameters */
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CHECK_INPUT_PARAM(base_address, 0, RET_BAD_NULL_PARAM,
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RES_MMU_BASE + RES_INVALID_INPUT_PARAM);
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CHECK_INPUT_RANGE_MIN0(page_sz, MMU_PAGE_MAX, RET_PARAM_OUT_OF_RANGE,
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RES_MMU_BASE + RES_INVALID_INPUT_PARAM);
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CHECK_INPUT_RANGE_MIN0(map_attrs->element_size, MMU_ELEMENTSIZE_MAX,
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RET_PARAM_OUT_OF_RANGE, RES_MMU_BASE +
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RES_INVALID_INPUT_PARAM);
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switch (page_sz) {
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case HW_PAGE_SIZE4KB:
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mmu_pg_size = HW_MMU_SMALL_PAGE;
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@ -526,10 +509,6 @@ static hw_status mmu_flush_entry(const void __iomem *base_address)
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hw_status status = 0;
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u32 flush_entry_data = 0x1;
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/*Check the input Parameters */
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CHECK_INPUT_PARAM(base_address, 0, RET_BAD_NULL_PARAM,
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RES_MMU_BASE + RES_INVALID_INPUT_PARAM);
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/* write values to register */
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MMUMMU_FLUSH_ENTRY_WRITE_REGISTER32(base_address, flush_entry_data);
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@ -546,10 +525,6 @@ static hw_status mmu_set_cam_entry(const void __iomem *base_address,
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hw_status status = 0;
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u32 mmu_cam_reg;
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/*Check the input Parameters */
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CHECK_INPUT_PARAM(base_address, 0, RET_BAD_NULL_PARAM,
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RES_MMU_BASE + RES_INVALID_INPUT_PARAM);
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mmu_cam_reg = (virtual_addr_tag << 12);
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mmu_cam_reg = (mmu_cam_reg) | (page_sz) | (valid_bit << 2) |
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(preserved_bit << 3);
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@ -570,13 +545,6 @@ static hw_status mmu_set_ram_entry(const void __iomem *base_address,
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hw_status status = 0;
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u32 mmu_ram_reg;
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/*Check the input Parameters */
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CHECK_INPUT_PARAM(base_address, 0, RET_BAD_NULL_PARAM,
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RES_MMU_BASE + RES_INVALID_INPUT_PARAM);
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CHECK_INPUT_RANGE_MIN0(element_size, MMU_ELEMENTSIZE_MAX,
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RET_PARAM_OUT_OF_RANGE, RES_MMU_BASE +
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RES_INVALID_INPUT_PARAM);
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mmu_ram_reg = (physical_addr & MMU_ADDR_MASK);
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mmu_ram_reg = (mmu_ram_reg) | ((endianism << 9) | (element_size << 7) |
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(mixed_size << 6));
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