mirror of https://gitee.com/openkylin/linux.git
Sparx5 DT updates for Linux 5.10
- Add public repo to MAINTAINERS - Add SPI controller and devices - Add eMMC controller and devices - Add temperature sensor -----BEGIN PGP SIGNATURE----- iJEEABYIADkWIQQaBzOicklHovJvajA3MaYaSgcc9AUCX2HdrxscbGFycy5wb3Zs c2VuQG1pY3JvY2hpcC5jb20ACgkQNzGmGkoHHPSyFgD8CeApRk+Nft2RMt72TyLW A/sGGCdqnhQqp7Sswpf625wA/idFqzcEfwQNVar29MBJ3A6Uu213DK4b/lnkw9cm Mg4E =Ln9n -----END PGP SIGNATURE----- Merge tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream into arm/dt Sparx5 DT updates for Linux 5.10 - Add public repo to MAINTAINERS - Add SPI controller and devices - Add eMMC controller and devices - Add temperature sensor * tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream: arm64: dts: sparx5: Add spi-nand devices arm64: dts: sparx5: Add spi-nor support arm64: dts: sparx5: Add SPI controller and associated mmio-mux MAINTAINERS: Add git tree for Sparx5 arm64: dts: sparx5: Add hwmon temperature sensor arm64: dts: sparx5: Add Sparx5 eMMC support Link: https://lore.kernel.org/r/878sda2dj0.fsf@microchip.com Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
38c419037a
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@ -2136,6 +2136,7 @@ M: Steen Hegelund <Steen.Hegelund@microchip.com>
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M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Supported
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T: git git://github.com/microchip-ung/linux-upstream.git
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F: arch/arm64/boot/dts/microchip/
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N: sparx5
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@ -5,6 +5,7 @@
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/microchip,sparx5.h>
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/ {
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compatible = "microchip,sparx5";
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@ -13,6 +14,7 @@ / {
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#size-cells = <1>;
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aliases {
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spi0 = &spi0;
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serial0 = &uart0;
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serial1 = &uart1;
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};
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@ -117,6 +119,22 @@ gic: interrupt-controller@600300000 {
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
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};
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cpu_ctrl: syscon@600000000 {
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compatible = "microchip,sparx5-cpu-syscon", "syscon",
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"simple-mfd";
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reg = <0x6 0x00000000 0xd0>;
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mux: mux-controller {
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compatible = "mmio-mux";
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#mux-control-cells = <0>;
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/*
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* SI_OWNER and SI2_OWNER in GENERAL_CTRL
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* SPI: value 9 - (SIMC,SIBM) = 0b1001
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* SPI2: value 6 - (SIBM,SIMC) = 0b0110
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*/
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mux-reg-masks = <0x88 0xf0>;
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};
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};
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uart0: serial@600100000 {
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pinctrl-0 = <&uart_pins>;
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pinctrl-names = "default";
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@ -143,6 +161,19 @@ uart1: serial@600102000 {
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status = "disabled";
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};
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spi0: spi@600104000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "microchip,sparx5-spi";
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reg = <0x6 0x00104000 0x40>;
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num-cs = <16>;
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reg-io-width = <4>;
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reg-shift = <2>;
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clocks = <&ahb_clk>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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timer1: timer@600105000 {
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compatible = "snps,dw-apb-timer";
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reg = <0x6 0x00105000 0x1000>;
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@ -151,6 +182,20 @@ timer1: timer@600105000 {
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
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};
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sdhci0: mmc@600800000 {
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compatible = "microchip,dw-sparx5-sdhci";
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status = "disabled";
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reg = <0x6 0x00800000 0x1000>;
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pinctrl-0 = <&emmc_pins>;
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pinctrl-names = "default";
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clocks = <&clks CLK_ID_AUX1>;
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clock-names = "core";
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assigned-clocks = <&clks CLK_ID_AUX1>;
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assigned-clock-rates = <800000000>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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bus-width = <8>;
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};
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gpio: pinctrl@6110101e0 {
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compatible = "microchip,sparx5-pinctrl";
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reg = <0x6 0x110101e0 0x90>, <0x6 0x10508010 0x100>;
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@ -161,6 +206,26 @@ gpio: pinctrl@6110101e0 {
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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cs1_pins: cs1-pins {
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pins = "GPIO_16";
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function = "si";
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};
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cs2_pins: cs2-pins {
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pins = "GPIO_17";
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function = "si";
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};
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cs3_pins: cs3-pins {
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pins = "GPIO_18";
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function = "si";
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};
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si2_pins: si2-pins {
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pins = "GPIO_39", "GPIO_40", "GPIO_41";
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function = "si2";
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};
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uart_pins: uart-pins {
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pins = "GPIO_10", "GPIO_11";
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function = "uart";
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@ -180,6 +245,15 @@ i2c2_pins: i2c2-pins {
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pins = "GPIO_28", "GPIO_29";
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function = "twi2";
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};
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emmc_pins: emmc-pins {
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pins = "GPIO_34", "GPIO_35", "GPIO_36",
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"GPIO_37", "GPIO_38", "GPIO_39",
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"GPIO_40", "GPIO_41", "GPIO_42",
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"GPIO_43", "GPIO_44", "GPIO_45",
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"GPIO_46", "GPIO_47";
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function = "emmc";
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};
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};
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i2c0: i2c@600101000 {
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@ -209,5 +283,12 @@ i2c1: i2c@600103000 {
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clock-frequency = <100000>;
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clocks = <&ahb_clk>;
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};
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tmon0: tmon@610508110 {
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compatible = "microchip,sparx5-temp";
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reg = <0x6 0x10508110 0xc>;
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#thermal-sensor-cells = <0>;
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clocks = <&ahb_clk>;
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};
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};
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};
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@ -0,0 +1,31 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
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*/
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&gpio {
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cs14_pins: cs14-pins {
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pins = "GPIO_44";
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function = "si";
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};
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};
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&spi0 {
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pinctrl-0 = <&si2_pins>;
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pinctrl-names = "default";
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spi@e {
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compatible = "spi-mux";
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <14>; /* CS14 */
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spi-flash@6 {
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compatible = "spi-nand";
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pinctrl-0 = <&cs14_pins>;
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pinctrl-names = "default";
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reg = <0x6>; /* SPI2 */
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spi-max-frequency = <42000000>;
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rx-sample-delay-ns = <7>; /* Tune for speed */
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};
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};
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};
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@ -16,6 +16,59 @@ memory@0 {
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};
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};
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&gpio {
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emmc_pins: emmc-pins {
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/* NB: No "GPIO_35", "GPIO_36", "GPIO_37"
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* (N/A: CARD_nDETECT, CARD_WP, CARD_LED)
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*/
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pins = "GPIO_34", "GPIO_38", "GPIO_39",
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"GPIO_40", "GPIO_41", "GPIO_42",
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"GPIO_43", "GPIO_44", "GPIO_45",
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"GPIO_46", "GPIO_47";
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drive-strength = <3>;
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function = "emmc";
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};
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};
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&sdhci0 {
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status = "okay";
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bus-width = <8>;
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non-removable;
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pinctrl-0 = <&emmc_pins>;
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max-frequency = <8000000>;
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microchip,clock-delay = <10>;
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};
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&spi0 {
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status = "okay";
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spi@0 {
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compatible = "spi-mux";
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>; /* CS0 */
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spi-flash@9 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <8000000>;
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reg = <0x9>; /* SPI */
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};
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};
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spi@1 {
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compatible = "spi-mux";
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mux-controls = <&mux 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>; /* CS1 */
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spi-flash@9 {
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compatible = "spi-nand";
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pinctrl-0 = <&cs1_pins>;
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pinctrl-names = "default";
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spi-max-frequency = <8000000>;
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reg = <0x9>; /* SPI */
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};
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};
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};
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&i2c1 {
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status = "okay";
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};
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@ -5,6 +5,7 @@
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/dts-v1/;
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#include "sparx5_pcb134_board.dtsi"
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#include "sparx5_nand.dtsi"
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/ {
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model = "Sparx5 PCB134 Reference Board (NAND)";
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@ -38,6 +38,38 @@ gpio-restart {
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};
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};
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&spi0 {
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status = "okay";
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spi@0 {
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compatible = "spi-mux";
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>; /* CS0 */
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spi-flash@9 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <8000000>;
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reg = <0x9>; /* SPI */
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};
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};
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};
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&spi0 {
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status = "okay";
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spi@0 {
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compatible = "spi-mux";
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>; /* CS0 */
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spi-flash@9 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <8000000>;
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reg = <0x9>; /* SPI */
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};
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};
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};
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&gpio {
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i2cmux_pins_i: i2cmux-pins-i {
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pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19",
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@ -15,3 +15,26 @@ memory@0 {
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reg = <0x00000000 0x00000000 0x10000000>;
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};
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};
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&gpio {
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emmc_pins: emmc-pins {
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/* NB: No "GPIO_35", "GPIO_36", "GPIO_37"
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* (N/A: CARD_nDETECT, CARD_WP, CARD_LED)
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*/
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pins = "GPIO_34", "GPIO_38", "GPIO_39",
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"GPIO_40", "GPIO_41", "GPIO_42",
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"GPIO_43", "GPIO_44", "GPIO_45",
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"GPIO_46", "GPIO_47";
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drive-strength = <3>;
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function = "emmc";
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};
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};
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&sdhci0 {
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status = "okay";
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pinctrl-0 = <&emmc_pins>;
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non-removable;
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max-frequency = <52000000>;
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bus-width = <8>;
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microchip,clock-delay = <10>;
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};
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@ -5,6 +5,7 @@
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/dts-v1/;
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#include "sparx5_pcb135_board.dtsi"
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#include "sparx5_nand.dtsi"
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/ {
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model = "Sparx5 PCB135 Reference Board (NAND)";
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@ -51,6 +51,38 @@ i2cmux_s32: i2cmux-3 {
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};
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};
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&spi0 {
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status = "okay";
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spi@0 {
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compatible = "spi-mux";
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>; /* CS0 */
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spi-flash@9 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <8000000>;
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reg = <0x9>; /* SPI */
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};
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};
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};
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&spi0 {
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status = "okay";
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spi@0 {
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compatible = "spi-mux";
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>; /* CS0 */
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spi-flash@9 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <8000000>;
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reg = <0x9>; /* SPI */
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};
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};
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};
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&axi {
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i2c0_imux: i2c0-imux@0 {
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compatible = "i2c-mux-pinctrl";
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@ -15,3 +15,26 @@ memory@0 {
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reg = <0x00000000 0x00000000 0x10000000>;
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};
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};
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&gpio {
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emmc_pins: emmc-pins {
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/* NB: No "GPIO_35", "GPIO_36", "GPIO_37"
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* (N/A: CARD_nDETECT, CARD_WP, CARD_LED)
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*/
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pins = "GPIO_34", "GPIO_38", "GPIO_39",
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"GPIO_40", "GPIO_41", "GPIO_42",
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"GPIO_43", "GPIO_44", "GPIO_45",
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"GPIO_46", "GPIO_47";
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drive-strength = <3>;
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function = "emmc";
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};
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};
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&sdhci0 {
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status = "okay";
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pinctrl-0 = <&emmc_pins>;
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non-removable;
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max-frequency = <52000000>;
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bus-width = <8>;
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microchip,clock-delay = <10>;
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};
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