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Merge series "ASoC: Intel: KMB: TDM Enablement patches" from Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>: 

This patch series is to enable multiple features on the Keembay Platform

Michael Sit Wei Hong (4):
  ASoC: Intel: KMB: Add 8kHz audio support
  ASoC: Intel: KMB: Rework disable channel function
  ASoC: Intel: KMB: Enable TDM audio capture
  dt-bindings: sound: intel,keembay-i2s: Add channel-max property

 .../bindings/sound/intel,keembay-i2s.yaml     |   8 +
 sound/soc/intel/keembay/kmb_platform.c        | 137 +++++++++++++-----
 sound/soc/intel/keembay/kmb_platform.h        |   1 +
 3 files changed, 112 insertions(+), 34 deletions(-)

--
2.17.1
This commit is contained in:
Mark Brown 2020-07-30 21:00:38 +01:00
parent 3d026a8a59 d13389849c
commit 39473c2cbd
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 24 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
sound/soc/intel/keembay/kmb_platform.c
View File

@ -28,8 +28,10 @@ static const struct snd_pcm_hardware kmb_pcm_hardware = {
SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_BATCH | SNDRV_PCM_INFO_BATCH |
SNDRV_PCM_INFO_BLOCK_TRANSFER, SNDRV_PCM_INFO_BLOCK_TRANSFER,
.rates = SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000, .rates = SNDRV_PCM_RATE_8000 |
.rate_min = 16000, SNDRV_PCM_RATE_16000 |
SNDRV_PCM_RATE_48000,
.rate_min = 8000,
.rate_max = 48000, .rate_max = 48000,
.formats = SNDRV_PCM_FMTBIT_S16_LE | .formats = SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_LE |
@ -107,14 +109,14 @@ static unsigned int kmb_pcm_rx_fn(struct kmb_i2s_info *kmb_i2s,
static inline void kmb_i2s_disable_channels(struct kmb_i2s_info *kmb_i2s, static inline void kmb_i2s_disable_channels(struct kmb_i2s_info *kmb_i2s,
u32 stream) u32 stream)
{ {
struct i2s_clk_config_data *config = &kmb_i2s->config;
u32 i; u32 i;
/* Disable all channels regardless of configuration*/
if (stream == SNDRV_PCM_STREAM_PLAYBACK) { if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
for (i = 0; i < config->chan_nr / 2; i++) for (i = 0; i < MAX_ISR; i++)
writel(0, kmb_i2s->i2s_base + TER(i)); writel(0, kmb_i2s->i2s_base + TER(i));
} else { } else {
for (i = 0; i < config->chan_nr / 2; i++) for (i = 0; i < MAX_ISR; i++)
writel(0, kmb_i2s->i2s_base + RER(i)); writel(0, kmb_i2s->i2s_base + RER(i));
} }
} }
@ -533,8 +535,10 @@ static struct snd_soc_dai_driver intel_kmb_platform_dai[] = {
.playback = { .playback = {
.channels_min = 2, .channels_min = 2,
.channels_max = 2, .channels_max = 2,
.rates = SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000, .rates = SNDRV_PCM_RATE_8000 |
.rate_min = 16000, SNDRV_PCM_RATE_16000 |
SNDRV_PCM_RATE_48000,
.rate_min = 8000,
.rate_max = 48000, .rate_max = 48000,
.formats = (SNDRV_PCM_FMTBIT_S32_LE | .formats = (SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_LE |
@ -543,8 +547,14 @@ static struct snd_soc_dai_driver intel_kmb_platform_dai[] = {
.capture = { .capture = {
.channels_min = 2, .channels_min = 2,
.channels_max = 2, .channels_max = 2,
.rates = SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000, /*
.rate_min = 16000, * .channels_max will be overwritten
* if provided by Device Tree
*/
.rates = SNDRV_PCM_RATE_8000 |
SNDRV_PCM_RATE_16000 |
SNDRV_PCM_RATE_48000,
.rate_min = 8000,
.rate_max = 48000, .rate_max = 48000,
.formats = (SNDRV_PCM_FMTBIT_S32_LE | .formats = (SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_LE |
@ -627,6 +637,10 @@ static int kmb_plat_dai_probe(struct platform_device *pdev)
return ret; return ret;
} }
/* To ensure none of the channels are enabled at boot up */
kmb_i2s_disable_channels(kmb_i2s, SNDRV_PCM_STREAM_PLAYBACK);
kmb_i2s_disable_channels(kmb_i2s, SNDRV_PCM_STREAM_CAPTURE);
dev_set_drvdata(dev, kmb_i2s); dev_set_drvdata(dev, kmb_i2s);
return ret; return ret;

1
sound/soc/intel/keembay/kmb_platform.h
View File

@ -90,6 +90,7 @@
#define MAX_CHANNEL_NUM 8 #define MAX_CHANNEL_NUM 8
#define MIN_CHANNEL_NUM 2 #define MIN_CHANNEL_NUM 2
#define MAX_ISR 4
#define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */ #define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */
#define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */ #define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */