mirror of https://gitee.com/openkylin/linux.git
IIO fixes for v3.6-rc1
These mostly consist of fixes from Lars-Peter Clausen that were the first part of a large series reworking the drivers concerned. Turns out these drivers had quite a wealth of minor bugs. Also here are some build warning fixes for lm3533-als and adjd_s111 (both new drives in this cycle). Final elements are a a div factor overflow and a warning related fix in a couple of Analog Devices drivers. All in all nothing major, but a worthwhile bunch of short fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) iQIcBAABAgAGBQJQLUxMAAoJEFSFNJnE9BaI1PgQALfDZXRXLaR3zxp+ZJMZsY6e LkGbi0PioGXyJG0/a5KYTTntFGrWTR6RDhofG1AAMiUCvfmR68a5E4dS3C+huHx4 5yvoiFo2W70Cuavne34C15ObmCX2sBQx9T0i1xMCbqizjN7hfwCsM2gyieMJ3/so xhxV1wvztqJOfLY93fGZUe7sz9vZa34fdZ5cgAQqF1GpO9awDY/fvMb6ecAJjPqV qxgsmdXhYJ0v41ukjnvZbebeHZKcbf6Ffo1DGLCvjw8w8h1JMdg8/gXuwmj3RLcY Y/oUvfUFGOx0RRkbGamgxhwo2STQ9SDwUohzblIufY38HFAEfiBFueJ7IctxXy6K HPdm0UL4nDgs751rOh5on3lbiv4wX0RHsXwkoKIXlueK0rptQ+uA+Uq/irCnEfJy xxn0X03kaNMgNtI3EK3/PbEsPpDEoVpeNHFW+ikVl6FBCjRpraoxnNGMg6ajV9kH U0Wigwj0vVZdVwpUQAXZoz1so/i00mC5pHOt+3znReEdgJkV63AnlY69IbjvxoLi 3eq50EMZUsxbCQdDdIIADPtabwxKRN2rphRMb/eAG/6ZAJCYZWrhrli/OTUmqzXs 4MaYEPyAjpUiyABVtKzONtSccP640kz3YSIg6ZKwGGYoI0/jXTlrXTlsKQUeNOtn ll/kwhqy1mXYW+Q7kpj3 =+LMV -----END PGP SIGNATURE----- Merge tag 'v3.6-rc1-iio-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus IIO fixes for v3.6-rc1 These mostly consist of fixes from Lars-Peter Clausen that were the first part of a large series reworking the drivers concerned. Turns out these drivers had quite a wealth of minor bugs. Also here are some build warning fixes for lm3533-als and adjd_s111 (both new drives in this cycle). Final elements are a a div factor overflow and a warning related fix in a couple of Analog Devices drivers. All in all nothing major, but a worthwhile bunch of short fixes.
This commit is contained in:
commit
3a491aeae8
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@ -129,7 +129,7 @@ static int adf4350_set_freq(struct adf4350_state *st, unsigned long long freq)
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{
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struct adf4350_platform_data *pdata = st->pdata;
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u64 tmp;
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u32 div_gcd, prescaler;
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u32 div_gcd, prescaler, chspc;
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u16 mdiv, r_cnt = 0;
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u8 band_sel_div;
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@ -158,14 +158,20 @@ static int adf4350_set_freq(struct adf4350_state *st, unsigned long long freq)
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if (pdata->ref_div_factor)
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r_cnt = pdata->ref_div_factor - 1;
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do {
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r_cnt = adf4350_tune_r_cnt(st, r_cnt);
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chspc = st->chspc;
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st->r1_mod = st->fpfd / st->chspc;
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while (st->r1_mod > ADF4350_MAX_MODULUS) {
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r_cnt = adf4350_tune_r_cnt(st, r_cnt);
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st->r1_mod = st->fpfd / st->chspc;
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}
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do {
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do {
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do {
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r_cnt = adf4350_tune_r_cnt(st, r_cnt);
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st->r1_mod = st->fpfd / chspc;
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if (r_cnt > ADF4350_MAX_R_CNT) {
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/* try higher spacing values */
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chspc++;
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r_cnt = 0;
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}
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} while ((st->r1_mod > ADF4350_MAX_MODULUS) && r_cnt);
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} while (r_cnt == 0);
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tmp = freq * (u64)st->r1_mod + (st->fpfd > 1);
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do_div(tmp, st->fpfd); /* Div round closest (n + d/2)/d */
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@ -194,7 +200,7 @@ static int adf4350_set_freq(struct adf4350_state *st, unsigned long long freq)
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st->regs[ADF4350_REG0] = ADF4350_REG0_INT(st->r0_int) |
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ADF4350_REG0_FRACT(st->r0_fract);
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st->regs[ADF4350_REG1] = ADF4350_REG1_PHASE(0) |
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st->regs[ADF4350_REG1] = ADF4350_REG1_PHASE(1) |
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ADF4350_REG1_MOD(st->r1_mod) |
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prescaler;
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@ -271,9 +271,10 @@ static int adjd_s311_update_scan_mode(struct iio_dev *indio_dev,
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const unsigned long *scan_mask)
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{
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struct adjd_s311_data *data = iio_priv(indio_dev);
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data->buffer = krealloc(data->buffer, indio_dev->scan_bytes,
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GFP_KERNEL);
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if (!data->buffer)
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kfree(data->buffer);
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data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
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if (data->buffer == NULL)
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return -ENOMEM;
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return 0;
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@ -404,7 +404,7 @@ static int lm3533_als_get_hysteresis(struct iio_dev *indio_dev, unsigned nr,
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return ret;
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}
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static int show_thresh_either_en(struct device *dev,
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static ssize_t show_thresh_either_en(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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@ -424,7 +424,7 @@ static int show_thresh_either_en(struct device *dev,
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return scnprintf(buf, PAGE_SIZE, "%u\n", enable);
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}
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static int store_thresh_either_en(struct device *dev,
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static ssize_t store_thresh_either_en(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t len)
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{
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@ -754,7 +754,7 @@ static ssize_t ad7192_set(struct device *dev,
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else
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st->mode &= ~AD7192_MODE_ACX;
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ad7192_write_reg(st, AD7192_REG_GPOCON, 3, st->mode);
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ad7192_write_reg(st, AD7192_REG_MODE, 3, st->mode);
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break;
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default:
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ret = -EINVAL;
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@ -798,6 +798,11 @@ static const struct attribute_group ad7195_attribute_group = {
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.attrs = ad7195_attributes,
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};
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static unsigned int ad7192_get_temp_scale(bool unipolar)
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{
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return unipolar ? 2815 * 2 : 2815;
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}
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static int ad7192_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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@ -824,19 +829,6 @@ static int ad7192_read_raw(struct iio_dev *indio_dev,
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*val = (smpl >> chan->scan_type.shift) &
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((1 << (chan->scan_type.realbits)) - 1);
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switch (chan->type) {
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case IIO_VOLTAGE:
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if (!unipolar)
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*val -= (1 << (chan->scan_type.realbits - 1));
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break;
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case IIO_TEMP:
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*val -= 0x800000;
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*val /= 2815; /* temp Kelvin */
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*val -= 273; /* temp Celsius */
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break;
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default:
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return -EINVAL;
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}
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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@ -848,11 +840,21 @@ static int ad7192_read_raw(struct iio_dev *indio_dev,
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mutex_unlock(&indio_dev->mlock);
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return IIO_VAL_INT_PLUS_NANO;
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case IIO_TEMP:
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*val = 1000;
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return IIO_VAL_INT;
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*val = 0;
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*val2 = 1000000000 / ad7192_get_temp_scale(unipolar);
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return IIO_VAL_INT_PLUS_NANO;
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default:
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return -EINVAL;
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}
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case IIO_CHAN_INFO_OFFSET:
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if (!unipolar)
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*val = -(1 << (chan->scan_type.realbits - 1));
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else
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*val = 0;
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/* Kelvin to Celsius */
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if (chan->type == IIO_TEMP)
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*val -= 273 * ad7192_get_temp_scale(unipolar);
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return IIO_VAL_INT;
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}
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return -EINVAL;
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@ -890,7 +892,7 @@ static int ad7192_write_raw(struct iio_dev *indio_dev,
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}
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ret = 0;
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}
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break;
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default:
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ret = -EINVAL;
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}
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@ -942,20 +944,22 @@ static const struct iio_info ad7195_info = {
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.channel = _chan, \
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.channel2 = _chan2, \
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
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IIO_CHAN_INFO_SCALE_SHARED_BIT, \
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IIO_CHAN_INFO_SCALE_SHARED_BIT | \
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IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
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.address = _address, \
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.scan_index = _si, \
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.scan_type = IIO_ST('s', 24, 32, 0)}
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.scan_type = IIO_ST('u', 24, 32, 0)}
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#define AD7192_CHAN(_chan, _address, _si) \
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{ .type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = _chan, \
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
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IIO_CHAN_INFO_SCALE_SHARED_BIT, \
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IIO_CHAN_INFO_SCALE_SHARED_BIT | \
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IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
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.address = _address, \
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.scan_index = _si, \
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.scan_type = IIO_ST('s', 24, 32, 0)}
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.scan_type = IIO_ST('u', 24, 32, 0)}
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#define AD7192_CHAN_TEMP(_chan, _address, _si) \
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{ .type = IIO_TEMP, \
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@ -965,7 +969,7 @@ static const struct iio_info ad7195_info = {
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IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
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.address = _address, \
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.scan_index = _si, \
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.scan_type = IIO_ST('s', 24, 32, 0)}
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.scan_type = IIO_ST('u', 24, 32, 0)}
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static struct iio_chan_spec ad7192_channels[] = {
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AD7192_CHAN_DIFF(1, 2, NULL, AD7192_CH_AIN1P_AIN2M, 0),
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@ -76,7 +76,7 @@ static irqreturn_t ad7298_trigger_handler(int irq, void *p)
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7298_state *st = iio_priv(indio_dev);
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struct iio_buffer *ring = indio_dev->buffer;
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s64 time_ns;
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s64 time_ns = 0;
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__u16 buf[16];
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int b_sent, i;
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@ -131,9 +131,10 @@ static const struct ad7780_chip_info ad7780_chip_info_tbl[] = {
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.indexed = 1,
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.channel = 0,
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
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IIO_CHAN_INFO_SCALE_SHARED_BIT,
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IIO_CHAN_INFO_SCALE_SHARED_BIT |
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IIO_CHAN_INFO_OFFSET_SHARED_BIT,
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.scan_type = {
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.sign = 's',
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.sign = 'u',
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.realbits = 24,
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.storagebits = 32,
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.shift = 8,
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@ -146,9 +147,10 @@ static const struct ad7780_chip_info ad7780_chip_info_tbl[] = {
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.indexed = 1,
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.channel = 0,
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
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IIO_CHAN_INFO_SCALE_SHARED_BIT,
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IIO_CHAN_INFO_SCALE_SHARED_BIT |
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IIO_CHAN_INFO_OFFSET_SHARED_BIT,
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.scan_type = {
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.sign = 's',
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.sign = 'u',
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.realbits = 20,
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.storagebits = 32,
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.shift = 12,
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@ -563,8 +563,9 @@ static ssize_t ad7793_show_scale_available(struct device *dev,
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return len;
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}
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static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
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S_IRUGO, ad7793_show_scale_available, NULL, 0);
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static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available,
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in_voltage-voltage_scale_available, S_IRUGO,
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ad7793_show_scale_available, NULL, 0);
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static struct attribute *ad7793_attributes[] = {
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&iio_dev_attr_sampling_frequency.dev_attr.attr,
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@ -604,9 +605,6 @@ static int ad7793_read_raw(struct iio_dev *indio_dev,
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*val = (smpl >> chan->scan_type.shift) &
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((1 << (chan->scan_type.realbits)) - 1);
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if (!unipolar)
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*val -= (1 << (chan->scan_type.realbits - 1));
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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@ -620,25 +618,38 @@ static int ad7793_read_raw(struct iio_dev *indio_dev,
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return IIO_VAL_INT_PLUS_NANO;
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} else {
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/* 1170mV / 2^23 * 6 */
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scale_uv = (1170ULL * 100000000ULL * 6ULL)
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>> (chan->scan_type.realbits -
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(unipolar ? 0 : 1));
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scale_uv = (1170ULL * 100000000ULL * 6ULL);
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}
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break;
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case IIO_TEMP:
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/* Always uses unity gain and internal ref */
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scale_uv = (2500ULL * 100000000ULL)
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>> (chan->scan_type.realbits -
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(unipolar ? 0 : 1));
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/* 1170mV / 0.81 mV/C / 2^23 */
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scale_uv = 1444444444444ULL;
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break;
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default:
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return -EINVAL;
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}
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*val2 = do_div(scale_uv, 100000000) * 10;
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*val = scale_uv;
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scale_uv >>= (chan->scan_type.realbits - (unipolar ? 0 : 1));
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*val = 0;
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*val2 = scale_uv;
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return IIO_VAL_INT_PLUS_NANO;
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case IIO_CHAN_INFO_OFFSET:
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if (!unipolar)
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*val = -(1 << (chan->scan_type.realbits - 1));
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else
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*val = 0;
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/* Kelvin to Celsius */
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if (chan->type == IIO_TEMP) {
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unsigned long long offset;
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unsigned int shift;
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shift = chan->scan_type.realbits - (unipolar ? 0 : 1);
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offset = 273ULL << shift;
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do_div(offset, 1444);
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*val -= offset;
|
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}
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return IIO_VAL_INT;
|
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}
|
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return -EINVAL;
|
||||
}
|
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|
@ -676,7 +687,7 @@ static int ad7793_write_raw(struct iio_dev *indio_dev,
|
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}
|
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ret = 0;
|
||||
}
|
||||
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
@ -720,9 +731,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
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.channel2 = 0,
|
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.address = AD7793_CH_AIN1P_AIN1M,
|
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
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IIO_CHAN_INFO_SCALE_SHARED_BIT,
|
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IIO_CHAN_INFO_SCALE_SHARED_BIT |
|
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IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
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.scan_index = 0,
|
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.scan_type = IIO_ST('s', 24, 32, 0)
|
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.scan_type = IIO_ST('u', 24, 32, 0)
|
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},
|
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.channel[1] = {
|
||||
.type = IIO_VOLTAGE,
|
||||
|
@ -732,9 +744,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel2 = 1,
|
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.address = AD7793_CH_AIN2P_AIN2M,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 1,
|
||||
.scan_type = IIO_ST('s', 24, 32, 0)
|
||||
.scan_type = IIO_ST('u', 24, 32, 0)
|
||||
},
|
||||
.channel[2] = {
|
||||
.type = IIO_VOLTAGE,
|
||||
|
@ -744,9 +757,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel2 = 2,
|
||||
.address = AD7793_CH_AIN3P_AIN3M,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 2,
|
||||
.scan_type = IIO_ST('s', 24, 32, 0)
|
||||
.scan_type = IIO_ST('u', 24, 32, 0)
|
||||
},
|
||||
.channel[3] = {
|
||||
.type = IIO_VOLTAGE,
|
||||
|
@ -757,9 +771,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel2 = 2,
|
||||
.address = AD7793_CH_AIN1M_AIN1M,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 3,
|
||||
.scan_type = IIO_ST('s', 24, 32, 0)
|
||||
.scan_type = IIO_ST('u', 24, 32, 0)
|
||||
},
|
||||
.channel[4] = {
|
||||
.type = IIO_TEMP,
|
||||
|
@ -769,7 +784,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
|
||||
.scan_index = 4,
|
||||
.scan_type = IIO_ST('s', 24, 32, 0),
|
||||
.scan_type = IIO_ST('u', 24, 32, 0),
|
||||
},
|
||||
.channel[5] = {
|
||||
.type = IIO_VOLTAGE,
|
||||
|
@ -778,9 +793,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel = 4,
|
||||
.address = AD7793_CH_AVDD_MONITOR,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 5,
|
||||
.scan_type = IIO_ST('s', 24, 32, 0),
|
||||
.scan_type = IIO_ST('u', 24, 32, 0),
|
||||
},
|
||||
.channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
|
||||
},
|
||||
|
@ -793,9 +809,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel2 = 0,
|
||||
.address = AD7793_CH_AIN1P_AIN1M,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 0,
|
||||
.scan_type = IIO_ST('s', 16, 32, 0)
|
||||
.scan_type = IIO_ST('u', 16, 32, 0)
|
||||
},
|
||||
.channel[1] = {
|
||||
.type = IIO_VOLTAGE,
|
||||
|
@ -805,9 +822,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel2 = 1,
|
||||
.address = AD7793_CH_AIN2P_AIN2M,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 1,
|
||||
.scan_type = IIO_ST('s', 16, 32, 0)
|
||||
.scan_type = IIO_ST('u', 16, 32, 0)
|
||||
},
|
||||
.channel[2] = {
|
||||
.type = IIO_VOLTAGE,
|
||||
|
@ -817,9 +835,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel2 = 2,
|
||||
.address = AD7793_CH_AIN3P_AIN3M,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 2,
|
||||
.scan_type = IIO_ST('s', 16, 32, 0)
|
||||
.scan_type = IIO_ST('u', 16, 32, 0)
|
||||
},
|
||||
.channel[3] = {
|
||||
.type = IIO_VOLTAGE,
|
||||
|
@ -830,9 +849,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel2 = 2,
|
||||
.address = AD7793_CH_AIN1M_AIN1M,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SHARED_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 3,
|
||||
.scan_type = IIO_ST('s', 16, 32, 0)
|
||||
.scan_type = IIO_ST('u', 16, 32, 0)
|
||||
},
|
||||
.channel[4] = {
|
||||
.type = IIO_TEMP,
|
||||
|
@ -842,7 +862,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
|
||||
.scan_index = 4,
|
||||
.scan_type = IIO_ST('s', 16, 32, 0),
|
||||
.scan_type = IIO_ST('u', 16, 32, 0),
|
||||
},
|
||||
.channel[5] = {
|
||||
.type = IIO_VOLTAGE,
|
||||
|
@ -851,9 +871,10 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
|
|||
.channel = 4,
|
||||
.address = AD7793_CH_AVDD_MONITOR,
|
||||
.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
|
||||
IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
|
||||
IIO_CHAN_INFO_OFFSET_SHARED_BIT,
|
||||
.scan_index = 5,
|
||||
.scan_type = IIO_ST('s', 16, 32, 0),
|
||||
.scan_type = IIO_ST('u', 16, 32, 0),
|
||||
},
|
||||
.channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
|
||||
},
|
||||
|
@ -901,7 +922,7 @@ static int __devinit ad7793_probe(struct spi_device *spi)
|
|||
else if (voltage_uv)
|
||||
st->int_vref_mv = voltage_uv / 1000;
|
||||
else
|
||||
st->int_vref_mv = 2500; /* Build-in ref */
|
||||
st->int_vref_mv = 1170; /* Build-in ref */
|
||||
|
||||
spi_set_drvdata(spi, indio_dev);
|
||||
st->spi = spi;
|
||||
|
|
|
@ -87,6 +87,8 @@
|
|||
#define ADF4350_MAX_BANDSEL_CLK 125000 /* Hz */
|
||||
#define ADF4350_MAX_FREQ_REFIN 250000000 /* Hz */
|
||||
#define ADF4350_MAX_MODULUS 4095
|
||||
#define ADF4350_MAX_R_CNT 1023
|
||||
|
||||
|
||||
/**
|
||||
* struct adf4350_platform_data - platform specific information
|
||||
|
|
Loading…
Reference in New Issue